Industry standard I/O for Amaranth HDL
☆31Jan 27, 2026Updated last month
Alternatives and similar repositories for amaranth-stdio
Users that are interested in amaranth-stdio are comparing it to the libraries listed below
Sorting:
- System on Chip toolkit for Amaranth HDL☆100Feb 24, 2026Updated last week
- Board definitions for Amaranth HDL☆124Updated this week
- Playground for experimenting with and sharing short Amaranth programs on the web☆20Oct 26, 2025Updated 4 months ago
- WebAssembly-based Yosys distribution for Amaranth HDL☆29Feb 25, 2026Updated last week
- download the macOS SDK legally without an Apple account☆11Jun 1, 2023Updated 2 years ago
- DSP Blocks for the nMigen (Python) Toolbox☆11Nov 5, 2020Updated 5 years ago
- SPIFlashProgrammer is a small and fast SPI Flash programming tool that's designed to be easy to use☆15May 15, 2023Updated 2 years ago
- ☆16Jan 25, 2026Updated last month
- Verilog Examples and WebFPGA Standard Library☆11Nov 25, 2019Updated 6 years ago
- ☆44Mar 12, 2025Updated 11 months ago
- RFCs for changes to the Amaranth language and standard components☆18Jan 26, 2026Updated last month
- VS Code based debugger for hardware designs in Amaranth or Verilog☆39Dec 3, 2024Updated last year
- Board and connector definition files for nMigen☆30Sep 22, 2020Updated 5 years ago
- System on Chip toolkit for nMigen☆19Apr 29, 2020Updated 5 years ago
- ☆21Apr 8, 2019Updated 6 years ago
- lightweight open HLS for FPGA rapid prototyping☆20Mar 22, 2018Updated 7 years ago
- A replacement for gtkwave, written in Rust with high-performance and larger-than-memory traces in mind.☆19Jul 7, 2022Updated 3 years ago
- A 32-bit RISC-V soft processor☆321Jan 26, 2026Updated last month
- A Binary Ninja plugin providing a set of BinaryViews for loading Motorola SREC, Intel HEX, and TI-TXT "hex" files☆10Sep 5, 2024Updated last year
- assorted library of utility cores for amaranth HDL☆102Sep 17, 2024Updated last year
- Experiments with Yosys cxxrtl backend☆50Jan 16, 2025Updated last year
- A normalizing interpreter for the untyped λ-calculus in 292 characters of Haskell☆10Mar 8, 2016Updated 9 years ago
- Wishbone bridge over SPI☆11Nov 13, 2019Updated 6 years ago
- Gate-level visualization generator for SKY130-based chip designs.☆20Jul 22, 2021Updated 4 years ago
- ☆25Sep 27, 2018Updated 7 years ago
- Various information about F-Zero GX, especially information gathered with tools like RAM watch.☆15Jan 4, 2021Updated 5 years ago
- Phaser AWG DSP design☆11May 6, 2025Updated 9 months ago
- Documenting Lattice's 28nm FPGA parts☆148Updated this week
- RISC-V CPU implementation in Amaranth HDL (aka nMigen)☆33Aug 27, 2024Updated last year
- softfloat and softposit in Python☆15Aug 2, 2019Updated 6 years ago
- Open source hardware down to the chip level!☆30Sep 24, 2021Updated 4 years ago
- a noodly Amaranth HDL-wrapper for FPGA SerDes' presenting a PIPE PHY interface☆31Dec 6, 2021Updated 4 years ago
- End-to-end synthesis and P&R toolchain☆94Feb 20, 2026Updated last week
- JTAG communication using the FTDI FT232R chip.☆21Mar 7, 2012Updated 13 years ago
- Some WIP GameCube toolchain in Rust☆13Jun 15, 2021Updated 4 years ago
- BFM Tester for Chisel HDL☆14Nov 27, 2021Updated 4 years ago
- Kicad Library to pretify your schematic with pride flags.☆16Nov 13, 2022Updated 3 years ago
- Description of Apple's LEAP ISA☆16Nov 21, 2022Updated 3 years ago
- Minimal CPU Emulator Powered by the ARM PL080 DMA Controller☆36Jul 25, 2024Updated last year