Ravenslofty / yosys-cookbookLinks
User-friendly explanation of Yosys options
☆112Updated 4 years ago
Alternatives and similar repositories for yosys-cookbook
Users that are interested in yosys-cookbook are comparing it to the libraries listed below
Sorting:
- System on Chip toolkit for Amaranth HDL☆97Updated last year
- The Critical Path - a rambly FPGA blog☆50Updated 5 years ago
- CoreScore☆167Updated 2 weeks ago
- Documenting Lattice's 28nm FPGA parts☆144Updated last year
- Board definitions for Amaranth HDL☆121Updated 2 months ago
- A replacement for gtkwave, written in Rust with high-performance and larger-than-memory traces in mind.☆19Updated 3 years ago
- RISC-V Processor written in Amaranth HDL☆39Updated 3 years ago
- PicoRV☆43Updated 5 years ago
- assorted library of utility cores for amaranth HDL☆97Updated last year
- VHDL library 4 FPGAs☆181Updated this week
- Project X-Ray Database: XC7 Series☆73Updated 3 years ago
- Ultimate ECP5 development board☆114Updated 6 years ago
- Mirror of https://codeberg.org/ECP5-PCIe/ECP5-PCIe☆102Updated 2 years ago
- Experimental flows using nextpnr for Xilinx devices☆245Updated last year
- Graded exercises for nMigen (WIP)☆55Updated 4 years ago
- Miscellaneous ULX3S examples (advanced)☆81Updated 4 months ago
- Experimental flows using nextpnr for Xilinx devices☆51Updated 5 months ago
- Convenience script to install the nextpnr-xilinx toolchain for Kintex7, Artix7, Spartan7 and Zynq7☆92Updated 4 months ago
- USB Serial on the TinyFPGA BX☆135Updated 4 years ago
- FPGA USB stack written in LiteX☆129Updated 3 years ago
- A single-wire bi-directional chip-to-chip interface for FPGAs☆123Updated 9 years ago
- Portable Verilog RTL interface to S27KL0641DABHI020 64Mbit HyperRAM IC☆91Updated 7 years ago
- Example LED blinking project for your FPGA dev board of choice☆186Updated 3 weeks ago
- End-to-end synthesis and P&R toolchain☆90Updated last month
- Naive Educational RISC V processor☆91Updated 3 weeks ago
- ☆87Updated 3 weeks ago
- an inverter drawn in magic with makefile to simulate☆26Updated 3 years ago
- Experiments with Yosys cxxrtl backend☆50Updated 9 months ago
- Create fast and efficient standard cell based adders, multipliers and multiply-adders.☆118Updated 2 years ago
- The ILA allows you to perform in-system debugging of your designs on the GateMate FPGA at runtime. All signals of your design inside the …☆56Updated last month