Open source FPGA-based NIC and platform for in-network compute
☆67Aug 21, 2025Updated 7 months ago
Alternatives and similar repositories for corundum
Users that are interested in corundum are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ☆27Jun 12, 2022Updated 3 years ago
- Ethernet interface modules for Cocotb☆77Sep 8, 2025Updated 7 months ago
- Verilog Content Addressable Memory Module☆117Mar 2, 2022Updated 4 years ago
- Various utilities for working with FPGAs☆13Mar 30, 2016Updated 10 years ago
- AXI interface modules for Cocotb☆327Mar 13, 2026Updated last month
- Serverless GPU API endpoints on Runpod - Bonus Credits • AdSkip the infrastructure headaches. Auto-scaling, pay-as-you-go, no-ops approach lets you focus on innovating your application.
- Extensible FPGA control platform☆62Apr 28, 2023Updated 2 years ago
- AMD OpenNIC driver includes the Linux kernel driver☆74Jan 3, 2025Updated last year
- AMD OpenNIC Shell includes the HDL source files☆137Jan 2, 2025Updated last year
- Verilog AXI stream components for FPGA implementation☆881Feb 27, 2025Updated last year
- PCI express simulation framework for Cocotb☆200Sep 8, 2025Updated 7 months ago
- FPGA board-level debugging and reverse-engineering tool☆39Mar 24, 2023Updated 3 years ago
- Verilog IP Cores & Tests☆13May 3, 2018Updated 7 years ago
- Open source FPGA-based NIC and platform for in-network compute☆2,261Jul 5, 2024Updated last year
- This repo contains the Limago code☆93May 8, 2025Updated 11 months ago
- Wordpress hosting with auto-scaling - Free Trial • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Verilog FT245 to AXI stream interface☆29Jun 20, 2018Updated 7 years ago
- gateware for the main fpga, including a hispi decoder and image processing☆13Sep 27, 2018Updated 7 years ago
- Bitstream Fault Analysis Tool☆15Jul 17, 2023Updated 2 years ago
- Verilog Ethernet components for FPGA implementation☆2,917Feb 27, 2025Updated last year
- VHDL Bypass descriptor controller for Xilinx DMA IP for PCIe☆18Oct 23, 2019Updated 6 years ago
- Open FPGA Modules☆24Oct 8, 2024Updated last year
- Verilog PCI express components☆1,568Apr 26, 2024Updated last year
- Verilog digital signal processing components☆172Oct 30, 2022Updated 3 years ago
- Gigabit MAC + UDP/TCP/IP offload Engine☆35Sep 17, 2019Updated 6 years ago
- Wordpress hosting with auto-scaling - Free Trial • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Networking Template Library for Vivado HLS☆29Jul 12, 2020Updated 5 years ago
- FlowBlaze: Stateful Packet Processing in Hardware☆71Nov 16, 2022Updated 3 years ago
- Verilog I2C interface for FPGA implementation☆694Feb 27, 2025Updated last year
- Mirror of NeTV FPGA Verilog Code☆15Jan 21, 2012Updated 14 years ago
- Scalable Network Stack for FPGAs (TCP/IP, RoCEv2)☆913Mar 27, 2026Updated 2 weeks ago
- Verilog wishbone components☆126Jan 5, 2024Updated 2 years ago
- Limago: an FPGA-based Open-source 100 GbE TCP/IP Stack☆137Sep 11, 2021Updated 4 years ago
- Verilog AXI components for FPGA implementation☆2,010Feb 27, 2025Updated last year
- SHA-256 IP core for ZedBoard (Zynq SoC)☆31Jun 22, 2018Updated 7 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- Example design for the Ethernet FMC using 4 AXI Ethernet Subsystem IP blocks☆72Apr 7, 2026Updated last week
- IP cores for the FPGA Libre project☆12Aug 7, 2017Updated 8 years ago
- UART models for cocotb☆34Sep 7, 2025Updated 7 months ago
- Works in Progress and Experiments for the Innova-2 Flex XCKU15P-based Board☆18Apr 4, 2024Updated 2 years ago
- An infrastructure for inline acceleration of network applications☆30Oct 25, 2021Updated 4 years ago
- Tool to parse yosys and nextpnr logfiles to then plot LUT, flip-flop and maximum frequency stats as your project progresses.☆23Oct 24, 2023Updated 2 years ago
- Python interface to PCIE☆40Apr 30, 2018Updated 7 years ago