alexforencich / pin-uartLinks
FPGA board-level debugging and reverse-engineering tool
☆39Updated 2 years ago
Alternatives and similar repositories for pin-uart
Users that are interested in pin-uart are comparing it to the libraries listed below
Sorting:
- PCIe analyzer experiments☆65Updated 5 years ago
- Test of the USB3 IP Core from Daisho on a Xilinx device☆100Updated 6 years ago
- Small footprint and configurable Inter-Chip communication cores☆66Updated last week
- LiteX development baseboards arround the SQRL Acorn.☆73Updated 10 months ago
- Extensible FPGA control platform☆61Updated 2 years ago
- ☆55Updated 3 years ago
- An all-digital GPS disciplined oscillator using MMCM phase shift.☆32Updated 3 years ago
- VHDL PCIe Transceiver☆32Updated 5 years ago
- FPGA IP cores for the Antikernel OS, intended to be included as a submodule in SoC integrations☆70Updated last month
- Open Source AES☆31Updated 4 months ago
- Cocotb (Python) based USB 1.1 test suite for FPGA IP, with testbenches for a variety of open source USB cores☆53Updated 2 years ago
- Small footprint and configurable JESD204B core☆52Updated 3 weeks ago
- Basic USB 1.1 Host Controller for small FPGAs☆97Updated 5 years ago
- FPGA gateware and pre-build bitstreams that expose SPI over JTAG. The protocol is implemented (among others) by openocd.☆58Updated 2 years ago
- Spen's Official OpenOCD Mirror☆51Updated 11 months ago
- Generic Logic Interfacing Project☆48Updated 5 years ago
- Small footprint and configurable SPI core☆46Updated 3 weeks ago
- USB Full Speed PHY☆48Updated 5 years ago
- PCIe adapter for an FPGA accelerator for Open CloudServer☆24Updated 5 years ago
- FTDI FT600 SuperSpeed USB3.0 to AXI bus master☆97Updated 5 years ago
- Convenience script to install the nextpnr-xilinx toolchain for Kintex7, Artix7, Spartan7 and Zynq7☆92Updated 7 months ago
- ☆45Updated 3 years ago
- Verilog FT245 to AXI stream interface☆29Updated 7 years ago
- Peripheral Component Interconnect (PCI) has taken the Express lane long ago, moving to xGbps SerDes. Now for the first time in opensource…☆55Updated last week
- A basic Soft(Gate)ware Defined Radio architecture☆100Updated 2 years ago
- The ILA allows you to perform in-system debugging of your designs on the GateMate FPGA at runtime. All signals of your design inside the …☆59Updated 2 months ago
- ☆33Updated 3 years ago
- USB serial device (CDC-ACM)☆44Updated 5 years ago
- ☆14Updated 2 years ago
- Wishbone controlled I2C controllers☆57Updated last year