alexforencich / pin-uart
FPGA board-level debugging and reverse-engineering tool
☆34Updated last year
Alternatives and similar repositories for pin-uart:
Users that are interested in pin-uart are comparing it to the libraries listed below
- An all-digital GPS disciplined oscillator using MMCM phase shift.☆27Updated 2 years ago
- FPGA gateware and pre-build bitstreams that expose SPI over JTAG. The protocol is implemented (among others) by openocd.☆53Updated last year
- ☆44Updated 2 years ago
- Small footprint and configurable Inter-Chip communication cores☆55Updated last month
- Small footprint and configurable JESD204B core☆41Updated last month
- Small footprint and configurable SPI core☆41Updated last month
- A general slow DDR3 interface. Very little resource consumption. Suits for all FPGAs with 1.5V IO voltage.☆37Updated 9 months ago
- Extensible FPGA control platform☆57Updated last year
- USB 2.0 FS Device controller IP core written in SystemVerilog☆33Updated 6 years ago
- ☆43Updated 2 years ago
- PCIe analyzer experiments☆49Updated 4 years ago
- Change part number or package in a Xilinx 7-series FPGA bitstream☆37Updated 4 years ago
- Cocotb (Python) based USB 1.1 test suite for FPGA IP, with testbenches for a variety of open source USB cores☆50Updated last year
- PCIe adapter for an FPGA accelerator for Open CloudServer☆22Updated 4 years ago
- ☆33Updated 4 years ago
- ☆42Updated 3 years ago
- Open-source CSI-2 receiver for Xilinx UltraScale parts☆35Updated 5 years ago
- ☆33Updated 2 years ago
- ☆22Updated 2 years ago
- A configurable USB 2.0 device core☆30Updated 4 years ago
- Use an MPSSE FTDI device as a JTAG interface in Quartus tools☆17Updated 11 months ago
- IEEE P1735 decryptor for VHDL☆29Updated 9 years ago
- Adapter to use Colorlight i5/i9 FPGA boards in a QMTech board form factor☆18Updated 2 years ago
- A demonstration showing how several components can be compsed to build a simulated spectrogram☆42Updated 10 months ago
- FPGA IP cores for the Antikernel OS, intended to be included as a submodule in SoC integrations☆62Updated this week
- ☆36Updated 3 years ago
- FTDI FT245 Style Synchronous/Asynchronous FIFO Bridge☆32Updated 3 years ago
- Tiny tips for Colorlight i5 FPGA board☆56Updated 3 years ago
- ULPI Link Wrapper (USB Phy Interface)☆25Updated 4 years ago
- ☆15Updated 2 years ago