Alternatives and similar repositories for xup_aie_training

Users that are interested in xup_aie_training are comparing it to the libraries listed below

• cornell-zhang / HiSparse
  High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS
  ☆95Updated last year
• tuna / tapa
  TAPA compiles task-parallel HLS program into high-performance FPGA accelerators.
  ☆175Updated 2 months ago
• SFU-HiAccel / uBench
  [FPGA'21] Microbenchmarks for Demystifying the Memory System of Modern Datacenter FPGAs for Software Programmers
  ☆31Updated 3 years ago
• linghaosong / Sextans
  An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).
  ☆87Updated last year
• Xilinx / ACCL
  Alveo Collective Communication Library: MPI-like communication operations for Xilinx Alveo accelerators
  ☆97Updated 3 months ago
• cwfletcher / buffets
  Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.
  ☆78Updated 6 years ago
• UCLA-VAST / hbmbench
  ☆24Updated 4 years ago
• SFU-HiAccel / rodinia-hls
  FPGA version of Rodinia in HLS C/C++
  ☆40Updated 4 years ago
• arc-research-lab / CHARM
  CHARM: Composing Heterogeneous Accelerators on Heterogeneous SoC Architecture
  ☆157Updated this week
• Xilinx / merlin-compiler
  ☆59Updated 2 years ago
• UIUC-ChenLab / ScaleHLS-HIDA
  ☆60Updated 7 months ago
• spcl / hls_tutorial_examples
  Examples shown as part of the tutorial "Productive parallel programming on FPGA with high-level synthesis".
  ☆201Updated 3 years ago
• Xilinx / SLASH
  A research shell for Alveo V80
  ☆18Updated last month
• MPSLab-ASU / ccf
  CGRA Compilation Framework
  ☆88Updated 2 years ago
• TeCSAR-UNCC / gem5-SALAM
  ☆101Updated last year
• tancheng / mlir-cgra
  An MLIR dialect to enable the efficient acceleration of ML model on CGRAs.
  ☆64Updated last year
• CMU-SAFARI / PiDRAM
  PiDRAM is the first flexible end-to-end framework that enables system integration studies and evaluation of real Processing-using-Memory …
  ☆68Updated last year
• tukl-msd / DRAMPower
  Fast and accurate DRAM power and energy estimation tool
  ☆179Updated 2 weeks ago
• GT-CHIPS / gem5_chips
  gem5 repository to study chiplet-based systems
  ☆82Updated 6 years ago
• breagen / MachSuite
  Benchmarks for Accelerator Design and Customized Architectures
  ☆130Updated 5 years ago
• Xtra-Computing / ThunderGP
  HLS-based Graph Processing Framework on FPGAs
  ☆150Updated 3 years ago
• template-hls / template-hls-float
  ☆30Updated 6 years ago
• PrincetonUniversity / muchiSim
  Simulator framework for analysis of performance, energy consumption, area and cost of multi-node multi-chiplet tile-based manycore design…
  ☆71Updated last year
• maeri-project / MAERI_bsv
  MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)
  ☆66Updated 4 years ago
• cornell-zhang / GraphLily
  A graph linear algebra overlay
  ☆51Updated 2 years ago
• tancheng / CGRA-Mapper
  An LLVM pass that can generate CDFG and map the target loops onto a parameterizable CGRA.
  ☆74Updated 2 weeks ago
• arc-research-lab / AIM
  AIM: Accelerating Arbitrary-precision Integer Multiplication on Heterogeneous Reconfigurable Computing Platform Versal ACAP (Full Paper a…
  ☆25Updated 5 months ago
• RC4ML / Shuhai
  Shuhai is a benchmarking-memory tool that allows FPGA programmers to demystify all the underlying details of memories, e.g., HBM and DDR4…
  ☆117Updated 4 months ago
• sharc-lab / LightningSim
  A fast, accurate trace-based simulator for High-Level Synthesis.
  ☆70Updated 6 months ago
• hngenc / systolic-array
  A DSL for Systolic Arrays
  ☆82Updated 6 years ago