tukl-msd / LSTM-PYNQ

Related projects ⓘ

Alternatives and complementary repositories for LSTM-PYNQ

• Xilinx / logicnets
  ☆83Updated 5 months ago
• Xilinx / SDSoC_Examples
  ☆82Updated 4 years ago
• Xilinx / PYNQ-Networking
  Networking Overlay on PYNQ
  ☆44Updated 5 years ago
• KastnerRG / Spector-HLS
  Contains FPGA benchmarks for Vivado HLS and Catapult HLS
  ☆24Updated 4 years ago
• icgrp / prflow_nested_dfx
  Fast and Flexible FPGA development using Hierarchical Partial Reconfiguration (FPT 2022)
  ☆12Updated 8 months ago
• drichmond / PYNQ-HLS
  A Tutorial on Putting High-Level Synthesis cores in PYNQ
  ☆102Updated 6 years ago
• Xilinx / gemx
  Matrix Operation Library for FPGA https://xilinx.github.io/gemx/
  ☆63Updated 5 years ago
• brianhill11 / FPGA-CNN
  This repo is for ECE44x (Fall2015-Spring2016)
  ☆19Updated 6 years ago
• fpgasystems / ZipML-PYNQ
  Linear model training using stochastic gradient descent (SGD) on PYNQ with full to low precision.
  ☆53Updated 6 years ago
• awai54st / LUTNet
  ☆55Updated 4 years ago
• kkiningh / cs231n-project
  CNN accelerator
  ☆26Updated 7 years ago
• isi-rcg / spicy
  Hot & Spicy tool suite
  ☆23Updated 2 years ago
• Licheng-Guo / vivado-hls-broadcast-optimization
  [DAC 2020] Analysis and Optimization of the Implicit Broadcasts in FPGA HLS to Improve Maximum Frequency
  ☆32Updated 3 years ago
• Xilinx / Alveo-PYNQ
  Introductory examples for using PYNQ with Alveo
  ☆48Updated last year
• PeterOgden / overlay_tutorial
  Premade bitstreams and block designs to complemented the PYNQ overlay tutorial
  ☆39Updated 2 years ago
• Xilinx / LSTM-PYNQ
  ☆86Updated 4 years ago
• cornell-zhang / rosetta
  Rosetta: A Realistic High-level Synthesis Benchmark Suite for Software Programmable FPGAs
  ☆158Updated last year
• Xilinx / ResNet50-PYNQ
  Quantized ResNet50 Dataflow Acceleration on Alveo, with PYNQ
  ☆52Updated 2 years ago
• Xilinx / PYNQ_Composable_Pipeline
  PYNQ Composabe Overlays
  ☆67Updated 5 months ago
• ARM-software / DeepFreeze
  ☆40Updated 4 years ago
• intel / rapid-design-methods-for-developing-hardware-accelerators
  ☆84Updated last year
• cornell-zhang / facedetect-fpga
  ☆45Updated 4 years ago
• scale-lab / DRUM
  The Verilog source code for DRUM approximate multiplier.
  ☆28Updated last year
• maao666 / HPDLA
  Systolic-array based Deep Learning Accelerator generator
  ☆24Updated 3 years ago
• hlslibs / hls_tutorials
  Tutorials on HLS Design
  ☆49Updated 4 years ago
• lite-david / comet
  RISC-V ISA based 32-bit processor written in HLS
  ☆16Updated 5 years ago
• UCLA-VAST / FlexCNN
  ☆70Updated last year
• sifive / block-nvdla-sifive
  ☆42Updated 3 years ago
• valar1234 / SDAI
  An Synthesizable Deep Learning Library based on Xilinx High Level Synthesis(HLS) tool
  ☆15Updated 7 years ago