Xilinx / GO-PYNQ

Related projects ⓘ

Alternatives and complementary repositories for GO-PYNQ

• AEW2015 / PYNQ_PR_Overlay
  Adding PR to the PYNQ Overlay
  ☆17Updated 7 years ago
• Xilinx / SDSoC_Examples
  ☆82Updated 4 years ago
• sfox14 / pynq-ekf
  A multi-board Extended Kalman Filter (EKF)
  ☆28Updated 6 years ago
• yunqu / dac_2018
  Design contest for DAC 2018
  ☆17Updated 6 years ago
• tukl-msd / LSTM-PYNQ
  ☆28Updated 6 years ago
• PeterOgden / overlay_tutorial
  Premade bitstreams and block designs to complemented the PYNQ overlay tutorial
  ☆39Updated 2 years ago
• Xilinx / PYNQ-Networking
  Networking Overlay on PYNQ
  ☆44Updated 5 years ago
• drichmond / PYNQ-HLS
  A Tutorial on Putting High-Level Synthesis cores in PYNQ
  ☆102Updated 6 years ago
• Xilinx / PYNQ-DL
  Xilinx Deep Learning IP
  ☆92Updated 3 years ago
• Avnet / Ultra96-PYNQ
  Board files to build Ultra 96 PYNQ image
  ☆151Updated 2 months ago
• cornell-brg / pymtl-tut-hls
  Tutorial for integrating PyMTL and Vivado HLS
  ☆17Updated 8 years ago
• Xilinx / Embedded-Reference-Platforms-User-Guide
  Formerly known as the 'reVISION Getting Started Guide', the Embedded Reference Platforms User Guide covers the embedded vision reference …
  ☆11Updated 7 months ago
• lp6m / ImageDetectionHW2
  HOG + SVM on FPGA
  ☆25Updated 3 years ago
• brianhill11 / FPGA-CNN
  This repo is for ECE44x (Fall2015-Spring2016)
  ☆19Updated 6 years ago
• maltanar / rosetta
  Rapidly deploy Chisel and Vivado HLS accelerators on Xilinx PYNQ
  ☆33Updated 6 years ago
• DreamIP / haddoc2
  Caffe to VHDL
  ☆66Updated 4 years ago
• Xilinx / gemx
  Matrix Operation Library for FPGA https://xilinx.github.io/gemx/
  ☆63Updated 5 years ago
• cornell-zhang / facedetect-fpga
  ☆45Updated 4 years ago
• Xilinx / PYNQ_Composable_Pipeline
  PYNQ Composabe Overlays
  ☆67Updated 4 months ago
• byuccl / BYU_PYNQ_PR_Video_Pipeline
  The Demo that was presented at FCCM.
  ☆14Updated 6 years ago
• arrayfire / xilinx_demos
  OpenCL Demos for Xilinx FPGAs
  ☆31Updated 8 years ago
• fpgasystems / ZipML-PYNQ
  Linear model training using stochastic gradient descent (SGD) on PYNQ with full to low precision.
  ☆53Updated 6 years ago
• KastnerRG / Spector-HLS
  Contains FPGA benchmarks for Vivado HLS and Catapult HLS
  ☆24Updated 4 years ago
• hirayaku / DAC2018-TGIIF
  The 1st place winner's source codes for DAC 2018 System Design Contest, FPGA Track
  ☆88Updated 5 years ago
• Xilinx / PYNQ-BOT
  ☆26Updated 6 years ago
• hillhao / PYNQ-project
  PYNQ, Neural network Language model, Overlay
  ☆101Updated 5 years ago
• fpgadeveloper / ethernet96
  Ethernet Mezzanine Card for the Ultra96
  ☆14Updated last year
• Avnet / bdf
  Avnet Board Definition Files
  ☆125Updated last week