MinLiAmoy / rnn-fpga
implementing a Recurrent Neural Network with binarized weight format on FPGA
☆22Updated 7 years ago
Alternatives and similar repositories for rnn-fpga
Users that are interested in rnn-fpga are comparing it to the libraries listed below
Sorting:
- This repo is for ECE44x (Fall2015-Spring2016)☆20Updated 7 years ago
- ☆46Updated 5 years ago
- verilog CNN generator for FPGA☆34Updated 4 years ago
- This is the first step to implement RNN on FPGAs. All modules are heavily commented. We will use High-Level Synthesis to turn these code …☆22Updated 5 years ago
- FPGA-based ZynqNet CNN accelerator developed by Vivado_HLS☆112Updated 7 years ago
- ☆87Updated 5 years ago
- Verilog Convolutional Neural Network on PYNQ☆28Updated 7 years ago
- Open Source Specialized Computing Stack for Accelerating Deep Neural Networks.☆212Updated 6 years ago
- The objective is to implement a Neural Network in VHDL code. It is aiming the Cyclone II FPGA Starter Development Kit hardware, but the N…☆28Updated 8 years ago
- FPGA based acceleration of Convolutional Neural Networks. The project is developed by Verilog for Altera DE5 Net platform.☆181Updated 8 years ago
- A convolutional neural network implemented in hardware (verilog)☆157Updated 7 years ago
- Caffe to VHDL☆67Updated 4 years ago
- Quantized ResNet50 Dataflow Acceleration on Alveo, with PYNQ☆58Updated 3 years ago
- ☆14Updated 9 years ago
- Systolic-array based Deep Learning Accelerator generator☆24Updated 4 years ago
- The 1st place winner's source codes for DAC 2018 System Design Contest, FPGA Track☆89Updated 6 years ago
- ☆65Updated 3 years ago
- Training and Implementation of a CNN for image classification with binary weights and activations on FPGA with HLS tools☆51Updated 6 years ago
- ☆84Updated 4 years ago
- Convolution Neural Network of vgg19 model in verilog☆47Updated 7 years ago
- ☆106Updated 5 years ago
- Jupyter notebook examples on image classification with quantized neural networks☆69Updated 5 years ago
- ☆119Updated 7 years ago
- A Tutorial on Putting High-Level Synthesis cores in PYNQ☆104Updated 7 years ago
- FPGA implementation of Cellular Neural Network (CNN)☆140Updated 7 years ago
- A FPGA Based CNN accelerator, following Google's TPU V1.☆150Updated 5 years ago
- Light-weighted neural network inference for object detection on small-scale FPGA board☆91Updated 5 years ago
- Premade bitstreams and block designs to complemented the PYNQ overlay tutorial☆40Updated 3 years ago
- Python code to show how a systolic array works. Written for https://medium.com/@antonpaquin/whats-inside-a-tpu-c013eb51973e☆28Updated 6 years ago
- PYNQ, Neural network Language model, Overlay☆106Updated 6 years ago