Xilinx / RFNoC-HLS-NeuralNet
☆106Updated 5 years ago
Alternatives and similar repositories for RFNoC-HLS-NeuralNet:
Users that are interested in RFNoC-HLS-NeuralNet are comparing it to the libraries listed below
- A Tutorial on Putting High-Level Synthesis cores in PYNQ☆104Updated 7 years ago
- PYNQ, Neural network Language model, Overlay☆106Updated 6 years ago
- Vitis HLS Library for FINN☆192Updated last week
- FPGA-based ZynqNet CNN accelerator developed by Vivado_HLS☆112Updated 7 years ago
- Xilinx Deep Learning IP☆91Updated 3 years ago
- A convolutional neural network implemented in hardware (verilog)☆158Updated 7 years ago
- SDSoC™ (Software-Defined System-On-Chip) Environment Tutorials☆151Updated 5 years ago
- This repository contains a "Hello World" introduction application to the Xilinx PYNQ framework.☆102Updated 2 years ago
- DPU on PYNQ☆219Updated last year
- ☆28Updated 7 years ago
- FPGA based acceleration of Convolutional Neural Networks. The project is developed by Verilog for Altera DE5 Net platform.☆181Updated 8 years ago
- PYNQ Composabe Overlays☆71Updated 10 months ago
- ☆83Updated 4 years ago
- Board files to build Ultra 96 PYNQ image☆154Updated 4 months ago
- Computer Vision Overlays on Pynq☆178Updated 5 years ago
- A trained Convolutional Neural Network implemented on ZedBoard Zynq-7000 FPGA.☆95Updated last year
- SystemVerilog HDL and TB code Deep Neural Network Hardware Accelerator implementation on zybo 7010 FPGA and also C code for Vivado SDK So…☆108Updated 5 years ago
- ☆87Updated 5 years ago
- Convolutional Neural Network Using High Level Synthesis☆87Updated 4 years ago
- PYNQ-Torch: a framework to develop PyTorch accelerators on the PYNQ platform☆71Updated 4 years ago
- A PYNQ overlay demonstrating Pythonic DSP running on Zynq UltraScale+☆39Updated 2 years ago
- FPGA implementation of Cellular Neural Network (CNN)☆140Updated 7 years ago
- This project is trying to create a base vitis platform to run with DPU☆46Updated 4 years ago
- Caffe to VHDL☆67Updated 4 years ago
- FPGA-based neural network inference project with an end-to-end approach (from training to implementation to deployment)☆270Updated 5 years ago
- RISC-V Integration for PYNQ☆170Updated 5 years ago
- Squeezenet V1.1 on Cyclone V SoC-FPGA at 450ms/image, 20x faster than ARM A9 processor alone. A project for 2017 Innovate FPGA design con…☆109Updated 6 years ago
- ☆118Updated 3 years ago
- FPGA accelerated TinyYOLO v2 object detection neural network☆71Updated 6 years ago
- Convolution Neural Network of vgg19 model in verilog☆46Updated 7 years ago