Alternatives and similar repositories for RFNoC-HLS-NeuralNet

Users that are interested in RFNoC-HLS-NeuralNet are comparing it to the libraries listed below

• Xilinx / SDSoC-Tutorials
  SDSoC™ (Software-Defined System-On-Chip) Environment Tutorials
  ☆155Updated 6 years ago
• hillhao / PYNQ-project
  PYNQ, Neural network Language model, Overlay
  ☆112Updated 6 years ago
• Xilinx / PYNQ-DL
  Xilinx Deep Learning IP
  ☆94Updated 4 years ago
• drichmond / PYNQ-HLS
  A Tutorial on Putting High-Level Synthesis cores in PYNQ
  ☆107Updated 7 years ago
• fpgasystems / spooNN
  FPGA-based neural network inference project with an end-to-end approach (from training to implementation to deployment)
  ☆282Updated 6 years ago
• Avnet / Ultra96-PYNQ
  Board files to build Ultra 96 PYNQ image
  ☆157Updated 4 months ago
• StefanSredojevic / Deep-Neural-Network-Hardware-Accelerator
  SystemVerilog HDL and TB code Deep Neural Network Hardware Accelerator implementation on zybo 7010 FPGA and also C code for Vivado SDK So…
  ☆112Updated 5 years ago
• Xilinx / PYNQ-BOT
  ☆30Updated 7 years ago
• Xilinx / PYNQ_Composable_Pipeline
  PYNQ Composabe Overlays
  ☆74Updated last year
• Xilinx / SDSoC_Examples
  ☆83Updated 5 years ago
• Xilinx / PYNQ-ComputerVision
  Computer Vision Overlays on Pynq
  ☆189Updated 6 years ago
• bmartini / zynq-axis
  Hardware, Linux Driver and Library for the Zynq AXI DMA interface
  ☆104Updated 7 years ago
• Xilinx / PYNQ-HelloWorld
  This repository contains a "Hello World" introduction application to the Xilinx PYNQ framework.
  ☆107Updated 3 years ago
• Xilinx / DPU-PYNQ
  DPU on PYNQ
  ☆241Updated 5 months ago
• alan4186 / Hardware-CNN
  A convolutional neural network implemented in hardware (verilog)
  ☆166Updated 8 years ago
• DreamIP / haddoc2
  Caffe to VHDL
  ☆68Updated 5 years ago
• Xilinx / finn-hlslib
  Vitis HLS Library for FINN
  ☆213Updated 3 weeks ago
• Xilinx / Vitis-In-Depth-Tutorial
  ☆117Updated 4 years ago
• gewuek / vitis_ai_custom_platform_flow
  This project is trying to create a base vitis platform to run with DPU
  ☆49Updated 5 years ago
• Xilinx / LSTM-PYNQ
  ☆91Updated 5 years ago
• drichmond / RISC-V-On-PYNQ
  RISC-V Integration for PYNQ
  ☆180Updated 6 years ago
• freecores / verilog_fixed_point_math_library
  Fixed Point Math Library for Verilog
  ☆145Updated 11 years ago
• Pieter-Berteloot / PYNQ_Projects
  Pynq projects and guides
  ☆29Updated 7 years ago
• Avnet / bdf
  Avnet Board Definition Files
  ☆139Updated 2 weeks ago
• sfox14 / pynq-ekf
  A multi-board Extended Kalman Filter (EKF)
  ☆32Updated 7 years ago
• Xilinx / logicnets
  Train and deploy LUT-based neural networks on FPGAs
  ☆106Updated last year
• definelicht / hlslib
  A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.
  ☆334Updated last year
• diaoenmao / FPGA-CNN
  FPGA implementation of Cellular Neural Network (CNN)
  ☆142Updated 7 years ago
• amiq-consulting / CNN-using-HLS
  Convolutional Neural Network Using High Level Synthesis
  ☆90Updated 5 years ago
• xupgit / FPGA-Design-Flow-using-Vivado
  This course gives an introduction to digital design tool flow in Xilinx programmable devices using Vivado® Design software suite
  ☆103Updated 6 years ago