This project was inspired by the efforts of Ben Eater to build an 8 bit computer on a breadboard. Even though this one was not built on a breadboard, it has the functionalities of his computer and modelled using Verilog HDL. This project was developed as a Mini Project in Digital Systems course in my 3rd semester at IIT Palakkad.
☆62Nov 30, 2022Updated 3 years ago
Alternatives and similar repositories for 8bit_MicroComputer_Verilog
Users that are interested in 8bit_MicroComputer_Verilog are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Solution to COA LAB Assgn, IIT Kharagpur☆38Jan 10, 2019Updated 7 years ago
- the project includes system design of a t intersection traffic light controller and its verilog code in vivado design suite.☆50Jul 18, 2020Updated 6 years ago
- This repository contains all labs done as a part of the Embedded Logic and Design course.☆28Jun 10, 2018Updated 8 years ago
- A verilog HDL based project to control a servomotor with voice commands from an android phone.☆12Nov 11, 2019Updated 6 years ago
- 5-stage pipelined 32-bit MIPS microprocessor in Verilog☆145Apr 3, 2020Updated 6 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- FIR Filter in Verilog☆15Nov 17, 2019Updated 6 years ago
- EE4415 Project : AES Verilog☆10Apr 25, 2019Updated 7 years ago
- Image Processing Toolbox in Verilog using Basys3 FPGA☆238May 20, 2025Updated last year
- Implementing Different Adder Structures in Verilog☆77Sep 3, 2019Updated 6 years ago
- DDR2 memory controller written in Verilog☆83Feb 28, 2012Updated 14 years ago
- 16 bit CPU created in Vivado with Verilog☆22Jun 30, 2022Updated 4 years ago
- Project 2.2 Frequency counter☆12May 30, 2025Updated last year
- Implementing 32 Verilog Mini Projects. 32 bit adder, Array Multiplier, Barrel Shifter, Binary Divider 16 by 8, Booth Multiplication, CRC …☆19Aug 6, 2025Updated 11 months ago
- Implementation of a simple SIMD processor in Verilog, core of which is a 16-bit SIMD ALU. 2's compliment calculations are implemented in …☆154Jul 17, 2022Updated 4 years ago
- End-to-end encrypted email - Proton Mail • AdSpecial offer: 40% Off Yearly / 80% Off First Month. All Proton services are open source and independently audited for security.
- Implementation of pipelined IIR bandstop filter in Verilog, C++ and MATLAB with fixed point arithmetic☆32May 6, 2017Updated 9 years ago
- miniSpartan6+ (Spartan6) FPGA based MP3 Player☆27Sep 2, 2019Updated 6 years ago
- RTL implementation for Advanced Encryption Standard (AES) in Verilog. Synthesis Done in Synopsys DC.☆10Dec 11, 2020Updated 5 years ago
- Hardware Viterbi Decoder in verilog☆32May 28, 2019Updated 7 years ago
- Exercises of the FPGA Prototyping By Verilog Examples book by Pong P. Chu☆25Jun 5, 2018Updated 8 years ago
- Design and Analysis of CMOS Inverter using the sky130 pdk and various open source tools☆129May 14, 2022Updated 4 years ago
- The AHB to APB bridge is an AHB slave and the only APB master which provides an interface between the highspeed AHB and the low-power APB…☆82Oct 7, 2022Updated 3 years ago
- 5 Day TCL begginer to advanced training workshop by VSD☆20Oct 18, 2023Updated 2 years ago
- UVM testbench for verifying the Pulpino SoC☆14Mar 23, 2020Updated 6 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- Static timing analysis (STA) is a method of validating the timing performance of a design by checking all possible paths for timing viola…☆19Oct 4, 2022Updated 3 years ago
- Synthesizable Verilog Source Codes(DUT), Test-bench and Simulation Results.☆41May 10, 2019Updated 7 years ago
- Verilog Design, Simulation & Synthesis of Digital ASIC Projects☆20Jan 27, 2023Updated 3 years ago
- nn2FPGA converts ONNX models into FPGA dataflow accelerators with seamless ONNX Runtime integration.☆21Jul 7, 2026Updated 2 weeks ago
- FPGA Projects written using SystemVerilog, Verilog, and VHDL are put here in seperate folders.☆19Apr 26, 2017Updated 9 years ago
- Verilog Project☆22Aug 30, 2021Updated 4 years ago
- Repository for compilation and cycle-accurate simulator for scale-out systolic arrays☆16Jan 4, 2023Updated 3 years ago
- This repository is dedicated to exploring the practical aspects of analog electronic circuits and Analog VLSI design. It contains a colle…☆27Jun 4, 2024Updated 2 years ago
- - A 1X3 Router (capable of routing the data packets to three different clients form a single source network) was designed, including a re…☆11Jun 3, 2019Updated 7 years ago
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- Reference book for SoC and FPGA designers integrating Arm Cortex-M processors with AMBA bus architectures (educational)☆43Jun 16, 2025Updated last year
- Collection of simple interfaces for Digilent Pmods☆13Aug 3, 2023Updated 2 years ago
- Development Platform for Raspberry Pi☆11Feb 11, 2024Updated 2 years ago
- Image Stiching for Panoramic Images☆10May 15, 2013Updated 13 years ago
- python library for 2d homographies☆15Jan 22, 2021Updated 5 years ago
- Project-based curriculum for teaching Arduino, IoT, and data science across secondary school levels (educational)