This project was inspired by the efforts of Ben Eater to build an 8 bit computer on a breadboard. Even though this one was not built on a breadboard, it has the functionalities of his computer and modelled using Verilog HDL. This project was developed as a Mini Project in Digital Systems course in my 3rd semester at IIT Palakkad.
☆59Nov 30, 2022Updated 3 years ago
Alternatives and similar repositories for 8bit_MicroComputer_Verilog
Users that are interested in 8bit_MicroComputer_Verilog are comparing it to the libraries listed below
Sorting:
- An 8 input interrupt controller written in Verilog.☆28Mar 22, 2012Updated 13 years ago
- 5-stage pipelined 32-bit MIPS microprocessor in Verilog☆140Apr 3, 2020Updated 5 years ago
- Solution to COA LAB Assgn, IIT Kharagpur☆37Jan 10, 2019Updated 7 years ago
- the project includes system design of a t intersection traffic light controller and its verilog code in vivado design suite.☆48Jul 18, 2020Updated 5 years ago
- This repository contains all labs done as a part of the Embedded Logic and Design course.☆27Jun 10, 2018Updated 7 years ago
- A verilog HDL based project to control a servomotor with voice commands from an android phone.☆12Nov 11, 2019Updated 6 years ago
- FIR Filter in Verilog☆15Nov 17, 2019Updated 6 years ago
- EE4415 Project : AES Verilog☆10Apr 25, 2019Updated 6 years ago
- DDR2 memory controller written in Verilog☆82Feb 28, 2012Updated 14 years ago
- Image Processing Toolbox in Verilog using Basys3 FPGA☆229May 20, 2025Updated 10 months ago
- Project 2.2 Frequency counter☆12May 30, 2025Updated 9 months ago
- This project give overview of RTL to GDSII of universal shift register using OpenLane and Skywater130 PDK. OpenLane is an automated open-…☆11Jul 19, 2022Updated 3 years ago
- Implementation of a simple SIMD processor in Verilog, core of which is a 16-bit SIMD ALU. 2's compliment calculations are implemented in …☆146Jul 17, 2022Updated 3 years ago
- 16 bit CPU created in Vivado with Verilog☆22Jun 30, 2022Updated 3 years ago
- Title : Communication Bridge between I2C and SPI Platform : RTL Coding (Verilog/System Verilog/VHDL) Duration : 1 Month Description : Bot…☆18Aug 21, 2018Updated 7 years ago
- Distributed arithmetic (DA) is another way of implementing a dot product where one of the arrays has constant elements. The DA can be eff…☆16Aug 26, 2021Updated 4 years ago
- Implementation of pipelined IIR bandstop filter in Verilog, C++ and MATLAB with fixed point arithmetic☆32May 6, 2017Updated 8 years ago
- There are the documents, floating and fixed-point algorithms, and Verilog codes for the project.☆11Jun 27, 2016Updated 9 years ago
- miniSpartan6+ (Spartan6) FPGA based MP3 Player☆27Sep 2, 2019Updated 6 years ago
- Exercises of the FPGA Prototyping By Verilog Examples book by Pong P. Chu☆25Jun 5, 2018Updated 7 years ago
- Hardware Viterbi Decoder in verilog☆31May 28, 2019Updated 6 years ago
- Design and Analysis of CMOS Inverter using the sky130 pdk and various open source tools☆128May 14, 2022Updated 3 years ago
- The AHB to APB bridge is an AHB slave and the only APB master which provides an interface between the highspeed AHB and the low-power APB…☆76Oct 7, 2022Updated 3 years ago
- UVM testbench for verifying the Pulpino SoC☆12Mar 23, 2020Updated 5 years ago
- Synthesizable Verilog Source Codes(DUT), Test-bench and Simulation Results.☆40May 10, 2019Updated 6 years ago
- [PACIS 2024] The official repo for the paper: "Phase Space Reconstructed Neural Ordinary Differential Equations Model for Stock Price For…☆10May 21, 2025Updated 10 months ago
- Verilog Design, Simulation & Synthesis of Digital ASIC Projects☆18Jan 27, 2023Updated 3 years ago
- Repository for compilation and cycle-accurate simulator for scale-out systolic arrays☆16Jan 4, 2023Updated 3 years ago
- - A 1X3 Router (capable of routing the data packets to three different clients form a single source network) was designed, including a re…☆11Jun 3, 2019Updated 6 years ago
- Reference book for SoC and FPGA designers integrating Arm Cortex-M processors with AMBA bus architectures (educational)☆39Jun 16, 2025Updated 9 months ago
- 5 Day TCL begginer to advanced training workshop by VSD☆19Oct 18, 2023Updated 2 years ago
- FPGA Projects written using SystemVerilog, Verilog, and VHDL are put here in seperate folders.☆19Apr 26, 2017Updated 8 years ago
- This repository is dedicated to exploring the practical aspects of analog electronic circuits and Analog VLSI design. It contains a colle…☆25Jun 4, 2024Updated last year
- Implementation of the paper "Deep Learning-Based Channel Estimation" (Lab based project)☆11Apr 20, 2020Updated 5 years ago
- Development Platform for Raspberry Pi☆11Feb 11, 2024Updated 2 years ago
- ☆82Feb 2, 2026Updated last month
- python library for 2d homographies☆15Jan 22, 2021Updated 5 years ago
- ☆15Sep 16, 2022Updated 3 years ago
- I am a VLSI enthusiast and I'm going to start my journey of 100 days of RTL.☆26Jul 23, 2023Updated 2 years ago