sarthak268 / Embedded_Logic_and_DesignLinks
This repository contains all labs done as a part of the Embedded Logic and Design course.
☆26Updated 7 years ago
Alternatives and similar repositories for Embedded_Logic_and_Design
Users that are interested in Embedded_Logic_and_Design are comparing it to the libraries listed below
Sorting:
- The Repository contains the code of various Digital Circuits☆11Updated 2 years ago
- This repository is a collection of designs invloving FPGAs and AI technologies.☆14Updated 2 years ago
- This project was inspired by the efforts of Ben Eater to build an 8 bit computer on a breadboard. Even though this one was not built on a…☆59Updated 3 years ago
- This is this VLSI designing Project. This Project is created in Cadence Virtuoso. See the PDF for Pre-Post layout results and other detai…☆35Updated 6 years ago
- RPHAX provides a quick automation flow to develop and prototype hardware accelerators on Xilinx FPGAs. Currently, the framework has suppo…☆21Updated 2 years ago
- ☆47Updated last year
- A RTL-based project in Verilog that shows real-time video captured by a CMOS camera OV7670 and displayed on a monitor through VGA at 640 …☆23Updated 2 years ago
- ☆13Updated last year
- IP operations in verilog (simulation and implementation on ice40)☆61Updated 6 years ago
- courses to learn VHDL☆17Updated 3 years ago
- VSDBabySoC is a small mixed-signal SoC including PLL, DAC, and a RISCV-based processor named RVMYTH.☆49Updated 4 years ago
- RISC V core implementation using Verilog.☆28Updated 4 years ago
- Exercises of the FPGA Prototyping By Verilog Examples book by Pong P. Chu☆23Updated 7 years ago
- Hardware Design and Verification of a configurable and parametrized 50th order low-pass FIR filter starting from MATLAB Modeling to Veril…☆29Updated 2 years ago
- Repository for system verilog labs from cadence☆14Updated 5 years ago
- Wishbone interconnect utilities☆44Updated 3 weeks ago
- Hardware and Software Co-design implementations☆15Updated 6 years ago
- Neural Network for Pattern Recognition on an FPGA. Project for Education. Video lectures explain training of the network and FPGA impleme…☆23Updated last year
- Reconfigurable Computing Lab, DESE, Indian Institiute of Science☆32Updated last year
- 6-stage dual-issue in-order superscalar risc-v cpu with floating point unit☆14Updated last week
- VHDL PCIe Transceiver☆32Updated 5 years ago
- Azadi (Freedom) is a 32-bit RISC-V CPU based System on Chip.☆32Updated 2 years ago
- Verilog Modules for a Digital PI Controller implemented on a Digilent NEXYS 4-DDR FPGA☆32Updated 5 years ago
- This repo shows an implementation of an FPGA from RTL to GDS with open Skywater-130 pdk☆38Updated 4 years ago
- Basic Peripheral SoC (SPI, GPIO, Timer, UART)☆68Updated 5 years ago
- Common elements for FPGA Design (FIFOs, RAMs, etc.)☆39Updated 10 months ago
- SPI Master Core clone from OpenCores☆11Updated 12 years ago
- The open- MSP430 is an open-source 16-bit microcontroller core written in Verilog, that is compatible with the Texas Instruments MSP430 m…☆16Updated 3 years ago
- TCL, verilog and shell scripts used while learning Cadence genus, innovus and tempus tools.☆16Updated 4 years ago
- RMII Firewall FPGA☆25Updated 6 years ago