This repository contains all labs done as a part of the Embedded Logic and Design course.
☆26Jun 10, 2018Updated 7 years ago
Alternatives and similar repositories for Embedded_Logic_and_Design
Users that are interested in Embedded_Logic_and_Design are comparing it to the libraries listed below
Sorting:
- My Lab Assigments from Bachelor Degree, This repo includes the projects for digital systems II Lecture (EEM334)☆25Jun 1, 2020Updated 5 years ago
- vhdl related contents☆11Apr 27, 2020Updated 5 years ago
- RISCV MYTH 4 stage pipelined core designed using TL-Verilog and supports RV32I base integer instruction set☆15Jan 14, 2021Updated 5 years ago
- ☆17Oct 6, 2023Updated 2 years ago
- 5-stage pipelined 32-bit MIPS microprocessor in Verilog☆139Apr 3, 2020Updated 5 years ago
- courses to learn VHDL☆17Mar 14, 2022Updated 3 years ago
- Cadence PCB and SCH Library and some tools☆14Jan 9, 2015Updated 11 years ago
- ☆12May 21, 2024Updated last year
- This repository contains the code and instructions for Arduino, Python, Streamlit, Machine Learning and more stuff!☆12Apr 8, 2024Updated last year
- VHDL code examples for a digital design course☆24Jan 29, 2020Updated 6 years ago
- miniSpartan6+ (Spartan6) FPGA based MP3 Player☆27Sep 2, 2019Updated 6 years ago
- This is this VLSI designing Project. This Project is created in Cadence Virtuoso. See the PDF for Pre-Post layout results and other detai…☆37Mar 22, 2019Updated 6 years ago
- An 8 input interrupt controller written in Verilog.☆28Mar 22, 2012Updated 13 years ago
- Tutorial series on verilog with code examples. Contains basic verilog code implementations and concepts.☆61Nov 25, 2020Updated 5 years ago
- VHDL grammar for tree-sitter☆32Dec 20, 2023Updated 2 years ago
- Repository for a 4-wheel robot car based on Arduino for the "Elegoo Smart Robot Car Kit V3.0 Plus" and similar ones.☆11Dec 20, 2022Updated 3 years ago
- Time to Digital Converter (TDC)☆36Dec 27, 2020Updated 5 years ago
- Solution to COA LAB Assgn, IIT Kharagpur☆37Jan 10, 2019Updated 7 years ago
- Image Processing Toolbox in Verilog using Basys3 FPGA☆228May 20, 2025Updated 9 months ago
- ☆10Oct 23, 2016Updated 9 years ago
- ☆11Oct 10, 2018Updated 7 years ago
- Inverse kinematics of ABB IRB 1600 in MATLAB☆10Jul 25, 2017Updated 8 years ago
- ☆11Apr 3, 2017Updated 8 years ago
- A SystemVerilog-based simulation and design of a Last Level Cache (LLC) implementing the MESI protocol, featuring Pseudo-LRU replacement,…☆15Nov 24, 2025Updated 3 months ago
- DIY ROS mobile robot☆40Apr 17, 2022Updated 3 years ago
- Integration of two camera 📷 modules to Basys 3 FPGA☆45Feb 8, 2023Updated 3 years ago
- cryptography ip-cores in vhdl / verilog☆41Feb 20, 2021Updated 5 years ago
- Main control terminal of educational UAV (PID Version)☆10May 23, 2020Updated 5 years ago
- Presentation based on the NYU (New York University) beamer template for an undergraduate thesis.☆10Jun 19, 2024Updated last year
- Studica Open Source ROS for VMX☆10Jan 12, 2022Updated 4 years ago
- Main repo of the OOP class☆11Oct 16, 2017Updated 8 years ago
- PyTorch Implementation for the paper "Let Me Help You! Neuro-Symbolic Short-Context Action Anticipation" accepted to RA-L'24.☆12Nov 27, 2024Updated last year
- Drawing Robot in V-REP with help of MATLAB (for Image processing)☆11Oct 20, 2021Updated 4 years ago
- Analysis of the kinematics of an ABB industrial robot☆10Nov 10, 2020Updated 5 years ago
- Image Stiching for Panoramic Images☆10May 15, 2013Updated 12 years ago
- A LaTeX document class for notes 📝 and textbooks 📚☆13Jul 14, 2021Updated 4 years ago
- Alpha64 R10000 Two-Way Superscalar Processor☆11May 6, 2019Updated 6 years ago
- Sargon Chess for CP/M☆11May 12, 2021Updated 4 years ago
- Jupyter-based open source book about how to get started in Control Theory with Matlab☆10Dec 4, 2022Updated 3 years ago