This project give overview of RTL to GDSII of universal shift register using OpenLane and Skywater130 PDK. OpenLane is an automated open-source EDA tool which gives RTL to GDSII flow.
☆11Jul 19, 2022Updated 4 years ago
Alternatives and similar repositories for Universal-Shift-Register
Users that are interested in Universal-Shift-Register are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- This repository documents my work on Advanced Physical Design Using OpenLANE/Sky130. The objective of this project was to implement an op…☆24Jul 7, 2021Updated 5 years ago
- FPGA with Xilinx Vitis HLS, Vivado, Vitis, and ZYNQ board. Working with HLS, Matrix Multiplier with HLS☆16Mar 1, 2021Updated 5 years ago
- Hardware and Software Co-design implementations☆16Dec 5, 2019Updated 6 years ago
- In this workshop, we will delve into the process of designing an Application Specific Integrated Circuit (ASIC) from the Register Transf…☆21Aug 19, 2024Updated 2 years ago
- A hardware implementation of a feed-forward Convolutional Neural Network called XNOR-Net which has faster execution due to the replacemen…☆18Sep 16, 2018Updated 8 years ago
- Open source password manager - Proton Pass • AdSecurely store, share, and autofill your credentials with Proton Pass, the end-to-end encrypted password manager trusted by millions.
- VLSI Design of an 8 x 2 SRAM Array | Cadence Virtuoso☆12Feb 10, 2020Updated 6 years ago
- In this repository, I have shared the codes for designs and testbenches, Elaborated Design and Simulation Output for each block of RISC-V…☆34Aug 28, 2024Updated 2 years ago
- RISC V core implementation using Verilog.☆31Mar 27, 2021Updated 5 years ago
- A project to perform the VLSI Physical Design Flow steps of partitioning, floorplan, placement and routing.☆13Jun 9, 2021Updated 5 years ago
- ☆35Nov 24, 2021Updated 4 years ago
- Convolutional Neural Network in C (for educational purposes)☆32Jan 18, 2021Updated 5 years ago
- This project produces a clean GDSII Layout with all its details that are used to print photomasks used in the fabrication of a behavioral…☆18Oct 16, 2021Updated 5 years ago
- This project is about building a Clocked Comparator to be used in a 4-bit Flash ADC & minimize the ADC Figure of Merit given by FoM = Pow…☆18Sep 12, 2023Updated 3 years ago
- IEEE Executive project for the year 2021-2022☆15Nov 22, 2022Updated 3 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- This repository contains all the contents studied and created during the Advanced Physical Design Workshop using OpenLANE and SKY130 PDK☆55Feb 22, 2022Updated 4 years ago
- A vision transformer based framework for classifying executable images as benign or malicious☆11Mar 19, 2024Updated 2 years ago
- CNN hardware accelerator to accelerate quantized LeNet-5 model☆47Sep 26, 2023Updated 3 years ago
- In this VLSI design course, we explored topics such as HLS programming, combination circuits, sequential circuits, and a capstone project…☆13Jul 23, 2024Updated 2 years ago
- IEEE Research paper with Code. Top class collection of IEEE Projects. Machine learning, Cryptography, Data science and Blockchain Project…☆20Jan 6, 2023Updated 3 years ago
- Digital image processing helps replace several mundane activities. My project in final year was ‘Application Control using Hand Gesture R…☆18Mar 27, 2017Updated 9 years ago
- ☆15Sep 27, 2022Updated 4 years ago
- This project was inspired by the efforts of Ben Eater to build an 8 bit computer on a breadboard. Even though this one was not built on a…☆62Nov 30, 2022Updated 3 years ago
- Education kit for teaching advanced Arm Cortex-A system-on-chip design on FPGA platforms with lectures and hands-on labs (educational)☆136Oct 7, 2025Updated last year
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- This is part of EC383 - Mini Project in VLSI Design.☆10May 8, 2022Updated 4 years ago
- 2 Week digital VLSI SoC design and planning workshop with complete RTL2GDSII flow organised by VSD in collaboration with NASSCOM (Advance…☆71Apr 13, 2024Updated 2 years ago
- Design and implementation in VHDL for FPGAs of a single cycle RISC-V based architecture☆15Jul 24, 2020Updated 6 years ago
- This repository contains the details and the code for the MIPS32 ISA based RISC Processor, which is implemented in 5 stage pipelined conf…☆23Apr 26, 2023Updated 3 years ago
- This project shows how to model a 4-bit flash ADC and a 4-bit DAC using ideal components. Used vdc, vpulse, vcvs, switch, res, cap, vccs …☆23Apr 20, 2019Updated 7 years ago
- Implementation of adaptive filters such as BMFLC, FLC, and WFLC in C++ using Arduino☆18Jul 13, 2017Updated 9 years ago
- [ICCD2026] CPPL: A Circuit Prompt Programming Language☆21Aug 19, 2026Updated 2 months ago
- Memory Level Verification of Dual Port RAM using SystemVerilog and Universal Verification Methodology Environments with assertions,functi…☆30Nov 21, 2020Updated 5 years ago
- Using Xilinx tools, the Unet architecture will be implemented and optimized for FPGA use. Some convolution-transposed conv sub-parts of t…☆19Feb 25, 2021Updated 5 years ago
- Proton VPN Special Offer - Get 70% off • AdSpecial partner offer. Trusted by over 100 million users worldwide. Tested, Approved and Recommended by Experts.
- A demo of running a custom object detection model on Raspberry Pi☆15Sep 14, 2022Updated 4 years ago
- Fast division by invariant integers using multiplication☆14Apr 11, 2026Updated 6 months ago
- IEEE Research paper and Final Year Project on Cryptography Communication Security. IEEE Paper with Code. Top class Research paper.☆34Aug 13, 2022Updated 4 years ago
- A project on hardware design for convolutional neural network. This neural network is of 2 layers with 400 inputs in the first layer. Thi…☆18Mar 5, 2018Updated 8 years ago
- [TIP'20] Official Implementation of MEF-SSIMd☆32Apr 12, 2026Updated 6 months ago
- Documentation for the 5 day workshop: Advanced Physical Design using OpenLane/Sky130☆99Sep 17, 2022Updated 4 years ago
- Notes for papers presented during our paper reading sessions☆20Mar 2, 2026Updated 7 months ago