FPGA Projects written using SystemVerilog, Verilog, and VHDL are put here in seperate folders.
☆19Apr 26, 2017Updated 9 years ago
Alternatives and similar repositories for fpga-projects
Users that are interested in fpga-projects are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- A web experiment to see how well you can estimate a minute. Compare yourself against 140k+ attempts☆13Apr 12, 2025Updated last year
- A set of small Verilog projects, to simulate and implement on FPGA development boards☆15Mar 5, 2018Updated 8 years ago
- Verilog design files and Icestudio file for Sobel Edge Detection with OV7670 camera using ULX3S FPGA Board☆19Nov 17, 2021Updated 4 years ago
- A simple SystemVerilog digital phase-locked loop based (roughly) on TI's SDLA005B application note. The design includes a SystemVerilog t…☆16Aug 29, 2022Updated 3 years ago
- A min-sum LDPC decoder written in SystemVerilog (IEEE 1800-2012)☆13Jan 8, 2021Updated 5 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- Building a simple oscilloscope using FPGA board and PCB.☆22Dec 30, 2020Updated 5 years ago
- Design, verification and ASIC implementation of a complete RISC-V CPU with: five stages pipeline, forwarding, automatic hazard detection,…☆17Apr 12, 2020Updated 6 years ago
- Synchronous FIFOs designed in Verilog/System Verilog.☆25Dec 21, 2025Updated 6 months ago
- - A 1X3 Router (capable of routing the data packets to three different clients form a single source network) was designed, including a re…☆11Jun 3, 2019Updated 7 years ago
- A blinky project for the ULX3S v3.0.3 FPGA board☆17Jan 16, 2026Updated 5 months ago
- - Designed a Nand Flash Controller, Flash Memory and Buffer (Design Target : Samsung K9F1G08R0A NAND Flash). - Implemented operations : …☆21Apr 15, 2018Updated 8 years ago
- DDR4 Simulation Project in System Verilog☆47Aug 18, 2014Updated 11 years ago
- Verilog HDL implementation of an ECHO machine and an FIR filter that filters out a specific noise. More details provided in individual fi…☆10Aug 25, 2019Updated 6 years ago
- FPGA Verilog HDL design project (DE1-SoC)☆13Jan 19, 2018Updated 8 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- EE4415 Project : AES Verilog☆10Apr 25, 2019Updated 7 years ago
- System Verilog using Functional Verification☆12Apr 8, 2024Updated 2 years ago
- Projects done for Advanced Digital Design with Verilog. Examples include code for applications like Sobel Edge Detection and DTMF generat…☆12Sep 10, 2018Updated 7 years ago
- Router 1 x 3 verilog implementation☆15Sep 5, 2021Updated 4 years ago
- ☆16Mar 27, 2024Updated 2 years ago
- ☆12Aug 26, 2016Updated 9 years ago
- An FPGA-based QOI image compressor and decompressor in Verilog. 基于FPGA的QOI图像压缩器和解压器。☆41Sep 18, 2024Updated last year
- Assertion-Based Formal Verification of an AHB2APB bridge, featuring SystemVerilog assertions, RTL designs, and detailed documentation inc…☆36Mar 23, 2024Updated 2 years ago
- Python library created while solving the Matasano Cryptopals challenges☆17Jun 17, 2021Updated 5 years ago
- End-to-end encrypted email - Proton Mail • AdSpecial offer: 40% Off Yearly / 80% Off First Month. All Proton services are open source and independently audited for security.
- Design and verify the AMBA AXI protocol with single master-slave from scratch in System Verilog. Debugging the design using both a System…☆13Oct 8, 2017Updated 8 years ago
- SystemVerilog examples and projects☆21Jun 10, 2025Updated last year
- ☆48Apr 7, 2024Updated 2 years ago
- ☆11Apr 27, 2022Updated 4 years ago
- Forked from the (now private) GL-iNet Infra Builder repo☆11Sep 16, 2023Updated 2 years ago
- SDRAM controller optimized to a memory bandwidth of 316MB/s☆30Aug 16, 2021Updated 4 years ago
- DDR3 SDRAM controller☆18Jul 17, 2014Updated 11 years ago
- Checkboxes☆10Jan 8, 2021Updated 5 years ago
- ☆10Jan 29, 2019Updated 7 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- curated resources for learning/playing/understanding/watching/researching, basically anything on CHESS☆19Nov 20, 2018Updated 7 years ago
- 🔴 SystemVerilog FPGA cores to communicate with FTDI Synchronous/Asynchronous FIFOs (FT245 protocol)☆47Jul 16, 2021Updated 4 years ago
- MicroPython driver for MPR121 capacitive touch keypads and breakout boards☆19Feb 14, 2020Updated 6 years ago
- This is a DIY project in which I control a relay module using ESP8266 via WiFi through BLynk. The relay module can activate or deactivate…☆18Oct 1, 2020Updated 5 years ago
- mt7615 V5.0.2.0 driver☆16Jul 31, 2019Updated 6 years ago
- ☆14Mar 8, 2018Updated 8 years ago
- A holistic framework for promoting high diversity ensemble learning.☆14Aug 27, 2024Updated last year