Exercises of the FPGA Prototyping By Verilog Examples book by Pong P. Chu
☆25Jun 5, 2018Updated 8 years ago
Alternatives and similar repositories for verilog-book
Users that are interested in verilog-book are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- example code for the logi-boards from pong chu HDL book☆30Sep 4, 2015Updated 11 years ago
- Tutorial series on verilog with code examples. Contains basic verilog code implementations and concepts.☆67Nov 25, 2020Updated 5 years ago
- Emulation of a 32-bit MIPS processor on Artix-7 FPGA using VHDL. The emulated MIPS processor is tested by executing RC5 encryption and de…☆18May 22, 2020Updated 6 years ago
- Asynchronous fifo using verilog and testbench using system verilog. For asynchronous Fifo design in different module.☆42Apr 13, 2021Updated 5 years ago
- Public repository to host our Checker IP written in SVA that is ported to run on open-source Verilator.☆12Mar 31, 2023Updated 3 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Xilinx Unisim Library in Verilog☆93Jul 22, 2020Updated 6 years ago
- Project 1.1 Simulate a Skywater 130nm standard cell using ngspice☆14Jul 18, 2025Updated last year
- The Orange Cartridge, an FPGA cartridge for the C64/C128☆21Sep 24, 2023Updated 3 years ago
- C64 core☆14Jul 25, 2026Updated 2 months ago
- 3-wide superscalar, out-of-order RISC-V processor (RV32IM subset) in System Verilog, demonstrating key Instruction-Level Parallelism☆33Aug 15, 2025Updated last year
- ☆20Feb 18, 2022Updated 4 years ago
- A machine learning application to read/classifiy AD5933 data from the MEMS Cancer sensor☆12Dec 11, 2024Updated last year
- All the projects and assignments done as part of VLSI course.☆21Sep 23, 2020Updated 6 years ago
- FPGA Games Gathered from GitHub in one place☆22Aug 19, 2022Updated 4 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Solution to COA LAB Assgn, IIT Kharagpur☆38Jan 10, 2019Updated 7 years ago
- Verilog Snippets for partial fulfilment of CS-F342 Computer Architecture,BITS Pilani☆17Nov 17, 2017Updated 8 years ago
- All of my Verilog_HDL codes☆11Apr 5, 2021Updated 5 years ago
- Synthesizable Verilog Source Codes(DUT), Test-bench and Simulation Results.☆41May 10, 2019Updated 7 years ago
- FPGA clone of the game Super Hexagon☆12May 12, 2015Updated 11 years ago
- IceCore Ice40 HX based modular core☆46Jan 23, 2021Updated 5 years ago
- YSYX RISC-V Project NJU Study Group☆16Jan 3, 2025Updated last year
- verification of the basic router protocol with UVM testbech //INCLUDED WITH RTL☆15Jan 4, 2019Updated 7 years ago
- RMII Firewall FPGA☆25Dec 2, 2019Updated 6 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- PSA-ADAC SDC-600 Secure Debug Manager library for authenticated debug☆17Mar 18, 2025Updated last year
- Examples of unions, interfaces, and assertions in SystemVerilog☆14Aug 31, 2013Updated 13 years ago
- FPU Double VHDL☆12Jul 17, 2014Updated 12 years ago
- This a a Diagnostics Harness for the Commodore VIC-20.☆27Jul 26, 2023Updated 3 years ago
- repository for binary releases☆26Jul 30, 2026Updated last month
- This repository contains all the contents studied and created during the Advanced Physical Design Workshop using OpenLANE and SKY130 PDK☆53Feb 22, 2022Updated 4 years ago
- Using verilog to implement MAC (Multiply Accumulate) . Verifying it by testbench .☆16Feb 17, 2019Updated 7 years ago
- Knowledge Graph of FPGA☆14Aug 21, 2021Updated 5 years ago
- This repository contains a SystemVerilog implementation of a parametrized Round Robin arbiter with three instantiation options☆13Jan 28, 2024Updated 2 years ago
- Serverless GPU API endpoints on Runpod - Get Bonus Credits • AdSkip the infrastructure headaches. Auto-scaling, pay-as-you-go, no-ops approach lets you focus on innovating your application.
- Brendan's repo for interesting SQL☆13Feb 27, 2020Updated 6 years ago
- ☆16Mar 27, 2024Updated 2 years ago
- ☆10Aug 19, 2018Updated 8 years ago
- 2-core MIPS R10K OoO Processor with Snooping MSI and Pipeline Bus☆14Jan 5, 2018Updated 8 years ago
- RISCV MYTH 4 stage pipelined core designed using TL-Verilog and supports RV32I base integer instruction set☆16Jan 14, 2021Updated 5 years ago
- ☆11Jul 26, 2017Updated 9 years ago
- Implementation of a cache memory in verilog☆14Dec 5, 2017Updated 8 years ago