kshitij1489 / Graph-Partitioning
The implementation is based on the Fiduccia-Mattheyses algorithm.
☆29Updated 8 years ago
Alternatives and similar repositories for Graph-Partitioning:
Users that are interested in Graph-Partitioning are comparing it to the libraries listed below
- ☆10Updated 8 months ago
- The first version of TritonPart☆24Updated last year
- ☆27Updated 3 years ago
- Hypergraph Partitioning: benchmarks, evaluators, best known solutions and codes☆63Updated 5 months ago
- This the contains the test examples and validator tool for the ISPD2021 Wafer-Scale Physics Modeling contest.☆18Updated 4 years ago
- ☆29Updated 4 years ago
- ☆20Updated 5 months ago
- Pin-Accessible Legalization for Mixed-Cell-Height Circuits☆26Updated 3 years ago
- ☆15Updated 6 months ago
- ☆24Updated last year
- GPU-based logic synthesis tool☆81Updated 8 months ago
- Global Router Built for ICCAD Contest 2019☆30Updated 5 years ago
- Mt-KaHyPar (Multi-Threaded Karlsruhe Hypergraph Partitioner) is a shared-memory multilevel graph and hypergraph partitioner equipped with…☆138Updated last week
- AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BR…☆101Updated last year
- ☆44Updated last year
- ☆38Updated 2 years ago
- Collection of digital hardware modules & projects (benchmarks)☆51Updated 4 months ago
- Implementation of hMETIS☆10Updated 2 years ago
- Mirror of the Si2 LEF/DEF parser (v5.8)☆13Updated 3 years ago
- ☆53Updated 4 years ago
- A Fast C++ Header-only Parser for Standard Parasitic Exchange Format (SPEF).☆55Updated 2 years ago
- An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit☆79Updated 2 months ago
- 2019 NTHU CS6135 (CS613500) VLSI Physical Design Automation Course Projects (include Two-way Min-cut Partitioning, Fixed-outline Slicing …☆34Updated this week
- VLSI EDA Global Router☆71Updated 7 years ago
- Encoder-decoder based generative networks for static and transient thermal analysis☆19Updated 2 years ago
- BoxRouter2.0 is a new global router for ultimate routability. It is inspired by BoxRouter [1], but can perform multi-layer routing with 2…☆20Updated 6 years ago
- Pursuing the best performance of linear solver in circuit simulation☆36Updated last month
- Multi-way graph partitioning algorithms: FMS (Fiduccia-Mattheyses-Sanchis), PLM (Partitioning by Locked Moves), PFM (Partitioning by Free…☆38Updated 4 years ago
- [ICCAD 22]DeePEB: A neural network based PEB solver☆10Updated 2 years ago
- ☆11Updated 9 months ago