zhhangBian / BOOM_chipView external linksLinks
乱序双发处理器,在2024年计算机系统能力大赛CPU赛道(龙芯杯)获二等奖,全国第四
☆18Aug 20, 2024Updated last year
Alternatives and similar repositories for BOOM_chip
Users that are interested in BOOM_chip are comparing it to the libraries listed below
Sorting:
- 顺序单/双发射LA32R处理器 (龙芯杯2024) A LA32R CPU in chisel☆25Jan 25, 2026Updated 3 weeks ago
- 中国科学技术大学龙芯杯参赛作品仓库合集☆16Oct 2, 2024Updated last year
- 基于LoongArch32/MIPS32指令集的七级流水线CPU。2023年龙芯杯(NSCSCC)个人赛参赛作品。☆36Apr 24, 2025Updated 9 months ago
- A 32-bit 5-stage RISC-V pipeline processor core with traps, S privilege mode, virtual memory, cache, branch prediction and TLB. Powered b…☆16Feb 14, 2024Updated 2 years ago
- ☆35Aug 22, 2023Updated 2 years ago
- ☆17Jul 31, 2024Updated last year
- A RISC-V Symmetric Multiprocessor(SMP) based on TileLink and can run Linux OS☆34Oct 23, 2025Updated 3 months ago
- Linux on RISC-V on FPGA (LOROF): RV64GC Sv39 Quad-Core Superscalar Out-of-Order Virtual Memory CPU☆15Updated this week
- ☆22Aug 11, 2024Updated last year
- Zircon CPU in 2024☆12Nov 21, 2025Updated 2 months ago
- UltraMIPS SoC composed of dual-issue cpu, pipeline Cache and systematic peripheral.☆147Jun 23, 2024Updated last year
- Linux-capable in-order superscaler LoongArch32r processor. Silicon-proven.☆45Jul 25, 2024Updated last year
- This repository contains a SystemVerilog implementation of a parametrized Round Robin arbiter with three instantiation options☆13Jan 28, 2024Updated 2 years ago
- 2024年电赛工程模板:基于正点原子F407ZGT6开发板 使用HAL库开发 内置多外设驱动和往年题用到的算法☆13Jul 28, 2024Updated last year
- 2020龙芯杯个人赛 简易双发射60M(含ibuffer)☆41Aug 24, 2020Updated 5 years ago
- nscscc2024,HPU河南理工大学参赛作品,两仪处理器☆11Aug 24, 2024Updated last year
- Poker Hand Detection Using Yolov8☆13Feb 26, 2023Updated 2 years ago
- An example Hardware Processing Engine☆12Feb 4, 2023Updated 3 years ago
- SJTU-EI332 计算机组成实验 pipelined cpu☆12Jun 11, 2020Updated 5 years ago
- LLCL-MIPS is a superscalar MIPS processor, which supports MIPS Release 1 instructions and is capable of booting linux kernel. (第五届龙芯杯特等奖作…☆37Jan 26, 2022Updated 4 years ago
- ☆33Jan 6, 2026Updated last month
- Vivado in GitLab-Runner for GitLab CI/CD☆10Oct 27, 2022Updated 3 years ago
- ☆14Jun 7, 2021Updated 4 years ago
- AXI DMA Check: A utility to measure DMA speeds in simulation☆15Jan 22, 2025Updated last year
- Lower chisel memories to SRAM macros☆13Mar 25, 2024Updated last year
- Example of a full DC synthesis script for a simple design☆13Feb 25, 2019Updated 6 years ago
- Tool to automate the setup and updates of a development environment for any project (Successor of devonfw-ide).☆33Jan 30, 2026Updated 2 weeks ago
- Port of MIT's xv6 OS to 32 bit RISC V☆12Feb 12, 2023Updated 3 years ago
- ☆13Feb 1, 2025Updated last year
- L1 Data, L1 Instruction and L2 Unified Cache Design FOR RV64IMC☆16Aug 18, 2022Updated 3 years ago
- CPU source code for NSCSCC 2023☆14Aug 26, 2023Updated 2 years ago
- ☆63Apr 22, 2025Updated 9 months ago
- ☆13Jul 5, 2019Updated 6 years ago
- ☆10Apr 4, 2025Updated 10 months ago
- Input / Output Physical Memory Protection Unit for RISC-V☆15Jul 20, 2023Updated 2 years ago
- Using Feature Decomposition method to accelerate GNN inference☆13Sep 27, 2021Updated 4 years ago
- Verilog Model for W25Q128JVxIM Serial Flash Memory☆17Jun 7, 2020Updated 5 years ago
- Implementation of a 32-bit single core risc-v platfrom for Xilinx zcu102 board☆12Nov 5, 2019Updated 6 years ago
- AD9959 Driver for STM32☆23Jul 21, 2025Updated 6 months ago