zhhangBian / BOOM_chipLinks
乱序双发处理器,在2024年计算机系统能力大赛CPU赛道(龙芯杯)获二等奖,全国第四
☆15Updated last year
Alternatives and similar repositories for BOOM_chip
Users that are interested in BOOM_chip are comparing it to the libraries listed below
Sorting:
- ☆70Updated 2 years ago
- ☆86Updated 2 weeks ago
- ☆78Updated 4 months ago
- ☆66Updated last year
- 体系结构研讨 + ysyx高阶大纲 (WIP☆178Updated 10 months ago
- "aura" my super-scalar O3 cpu core☆24Updated last year
- Open Source Chip Project by University (OSCPU) - Zhoushan Core☆51Updated 3 years ago
- 一生一芯 , ysyx , npc . the repo of the YSYX project . a riscv-64 CPU . writing .☆32Updated 3 years ago
- This is my graduation project, a simple processor soft core, which implements RV32I ISA.☆16Updated 6 years ago
- ☆67Updated 6 months ago
- ☆25Updated 3 weeks ago
- A RISC-V RV32I ISA Single Cycle CPU☆25Updated 3 months ago
- UltraMIPS SoC composed of dual-issue cpu, pipeline Cache and systematic peripheral.☆142Updated last year
- CPU Design Based on RISCV ISA☆120Updated last year
- ☆18Updated 2 years ago
- 我设计了一些数字集成电路的教学实验,供大家学习~☆28Updated 7 months ago
- 龙芯杯个人赛工具包(适用于个人赛的golden_trace工具)☆61Updated last year
- Collect some IC textbooks for learning.☆155Updated 3 years ago
- A LoongArch pipeline CPU. Project of Computer Architecture Lab @UCAS.☆27Updated last year
- AXI协议规范中文翻译版☆160Updated 3 years ago
- A tool to decode RISC-V and LoongArch and MIPS instructions in gtkwave☆31Updated 4 months ago
- ☆42Updated 3 years ago
- 2020龙芯杯个人赛 简易双发射60M(含ibuffer)☆40Updated 5 years ago
- A framework for ysyx flow☆11Updated 9 months ago
- ☆20Updated last year
- 一生一芯RISCV处理器核代码仓库(包括相关工具)☆15Updated 11 months ago
- ☆155Updated 3 weeks ago
- ☆40Updated last year
- 关于移植模型至gemmini的文档☆29Updated 3 years ago
- A small SoC with a pipeline 32-bit RISC-V CPU.☆65Updated 3 years ago