NSCSCC 2023 The Second Prize. TEAM PUA FROM HDU.
☆14Mar 29, 2025Updated last year
Alternatives and similar repositories for PUA-MIPS
Users that are interested in PUA-MIPS are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Second Prize in NSCSCC 2024. An out-of-order CPU designed by NoAXI team from HDU. 2024年全国大学生计算机系统能力大赛CPU设计赛（龙芯杯）团队赛二等奖作品☆26Sep 14, 2024Updated last year
- Vivado in GitLab-Runner for GitLab CI/CD☆10Oct 27, 2022Updated 3 years ago
- High performance LA32R out-of-order processor core. (NSCSCC 2023 Special Prize)☆100Aug 29, 2023Updated 2 years ago
- ☆35Aug 22, 2023Updated 2 years ago
- UltraMIPS SoC composed of dual-issue cpu, pipeline Cache and systematic peripheral.☆150Jun 23, 2024Updated 2 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- CPU source code for NSCSCC 2023☆14Aug 26, 2023Updated 2 years ago
- CPU敏捷开发框架（龙芯杯2024）☆28Sep 6, 2024Updated last year
- 顺序单/双发射LA32R处理器 (龙芯杯2024) A LA32R CPU in chisel☆32Jan 25, 2026Updated 6 months ago
- ☆17Jul 31, 2024Updated 2 years ago
- 给NEMU移植Linux Kernel!☆23Jun 1, 2025Updated last year
- Lower chisel memories to SRAM macros☆13Mar 25, 2024Updated 2 years ago
- 2022龙芯杯个人赛三等奖作品☆14Oct 11, 2023Updated 2 years ago
- Linux-capable in-order superscaler LoongArch32r processor. Silicon-proven.☆49Jul 25, 2024Updated 2 years ago
- ☆25Nov 14, 2023Updated 2 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- ☆26Aug 11, 2024Updated 2 years ago
- ☆14Nov 23, 2020Updated 5 years ago
- A simple full system emulator. Currently support RV64IMACSU and MIPS32 and LoongArch32. Capable of booting Linux. Suitable for education …☆121Oct 31, 2024Updated last year
- ☆33Apr 10, 2026Updated 4 months ago
- 2020龙芯杯个人赛 简易双发射60M（含ibuffer）☆46Aug 24, 2020Updated 5 years ago
- A RISC-V core running Debian (and a LoongArch core running Linux).☆23Nov 24, 2025Updated 8 months ago
- work in progress, playing around with btor2 in rust☆15Updated this week
- ☆67Aug 5, 2024Updated 2 years ago
- Port of MIT's xv6 OS to 32 bit RISC V☆12Feb 12, 2023Updated 3 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- NSCSCC “龙芯杯” 2024 个人赛 LoongArch 赛道三等奖☆20Aug 17, 2024Updated 2 years ago
- Build mini linux for your own RISC-V emulator!☆25Sep 11, 2024Updated last year
- A 2-Way Super-Scalar OoO RISC-V Core Based on Intel P6 Microarchitecture.☆17Sep 27, 2022Updated 3 years ago
- Artifact for "DX100: A Programmable Data Access Accelerator for Indirection (ISCA 2025)" paper☆19Nov 6, 2025Updated 9 months ago
- nscscc2024，HPU河南理工大学参赛作品，两仪处理器☆13Aug 24, 2024Updated last year
- ☆14Jun 12, 2024Updated 2 years ago
- ☆18Jun 24, 2024Updated 2 years ago
- Zircon CPU in 2024☆13Nov 21, 2025Updated 8 months ago
- 这是一个用chisel实现的FP8混合乘加单元☆18Jun 18, 2025Updated last year
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- 龙芯杯2021个人赛决赛最终代码☆11Sep 1, 2021Updated 4 years ago
- SoC for CQU Dual Issue Machine☆12Sep 20, 2022Updated 3 years ago
- Anatomy of a powerhouse: SystemVerilog TPU based on Google TPU v1☆25Nov 9, 2025Updated 9 months ago
- Template for project1 TPU☆23May 1, 2021Updated 5 years ago
- 2024年第八届龙芯杯 LA 个人赛二等奖参赛作品☆30Aug 20, 2024Updated last year
- Open source RTL implementation of Tensor Core, Sparse Tensor Core, BitWave and SparSynergy in the article: "SparSynergy: Unlocking Flexib…☆26Mar 29, 2025Updated last year
- 龙芯杯21个人赛作品☆36Sep 15, 2021Updated 4 years ago