Devotes to open source FPGA
☆28May 9, 2020Updated 5 years ago
Alternatives and similar repositories for Open-FPGA
Users that are interested in Open-FPGA are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ☆23Dec 7, 2019Updated 6 years ago
- ☆15May 9, 2020Updated 5 years ago
- ☆11Oct 10, 2019Updated 6 years ago
- A MCU implementation based PODES-M0O☆19Jan 31, 2020Updated 6 years ago
- ☆12May 23, 2017Updated 8 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- My project for the course "Logic and Computer Design Fundamentals"(LCDF) in Zhejiang University☆12May 14, 2017Updated 8 years ago
- ☆16Oct 30, 2022Updated 3 years ago
- 适用于FPGA——利用串口通信接收幅度频率信息数据帧，控制DA输出相应正弦信号☆10Jul 10, 2019Updated 6 years ago
- 视频旋转（2019FPGA大赛）☆41May 5, 2020Updated 6 years ago
- 基于Verilog实现的串口发送程序，带奇偶校验位。☆12Aug 23, 2019Updated 6 years ago
- Flappy Bird on Verilog☆16Jun 6, 2023Updated 2 years ago
- Verilog RS232 Enhanced Synch-UART & RS232 Debugger HDL core with PC host RS232 real-time Hex-editor / viewer host utility.☆12Jan 15, 2022Updated 4 years ago
- ☆37Nov 11, 2018Updated 7 years ago
- ☆13May 21, 2019Updated 6 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- A small 32-bit implementation of the RISC-V architecture☆32Apr 10, 2026Updated 3 weeks ago
- Simple OS for raspberry pi 2 model B☆13Jun 24, 2017Updated 8 years ago
- Project and presentation for SpaceX Application☆14Jul 21, 2017Updated 8 years ago
- Reindeer Soft CPU for Step CYC10 FPGA board☆27Dec 2, 2020Updated 5 years ago
- Verilog UART FIFO that will just echo back characters. Useful for testing the communications path.☆13May 5, 2015Updated 11 years ago
- Hand written number classification done in hardware (De1-SoC board) using neural networks☆25Mar 21, 2018Updated 8 years ago
- I2C Slave☆14Jul 17, 2014Updated 11 years ago
- Characterizing and Optimizing EDA Flows for the Cloud (DATE'2021 and TCAD)☆11Nov 2, 2021Updated 4 years ago
- This repository is outdated and the related functionality has been migrated to https://github.com/easysoc/easysoc-firrtl☆11Nov 3, 2021Updated 4 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Fully parametrizable combinatorial parallel LFSR/CRC module☆160Feb 27, 2025Updated last year
- 10_100_1000 Mbps tri-mode ethernet MAC☆10Jul 17, 2014Updated 11 years ago
- AltOr32 - Alternative Lightweight OpenRisc CPU☆13Dec 17, 2015Updated 10 years ago
- Purdue Proton Lab Experiments for ECE 362☆40Updated this week
- a simple Gobang using C#, the only thing matters is the score table, no AI used☆12Mar 1, 2012Updated 14 years ago
- Video Stream Scaler☆41Jul 17, 2014Updated 11 years ago
- RISC-V Integration for PYNQ☆12Apr 10, 2020Updated 6 years ago
- HDL & FPGA 学习和规范。CC-BY-NC-SA 4.0。☆16Jun 9, 2023Updated 2 years ago
- Projects for the ECPiX-5 - a ECP5 FPGA board.☆14Jul 5, 2020Updated 5 years ago
- End-to-end encrypted email - Proton Mail • AdSpecial offer: 40% Off Yearly / 80% Off First Month. All Proton services are open source and independently audited for security.
- qbittorrent 辅助工具☆13Feb 28, 2025Updated last year
- ☆16Jan 8, 2022Updated 4 years ago
- SoCGen is a tool that automates SoC design by taking in a JSON description of the system and producing the final GDS-II. SoCGen supports …☆40Dec 4, 2020Updated 5 years ago
- Two Verilog SPI module implementations (hard and soft) with advanced options and AXI Full Interface☆22Nov 21, 2017Updated 8 years ago
- Projects done for Advanced Digital Design with Verilog. Examples include code for applications like Sobel Edge Detection and DTMF generat…☆12Sep 10, 2018Updated 7 years ago
- A LiteX module implementing a USB UAC2 module with simple PDM in/out☆16Feb 16, 2022Updated 4 years ago
- https://12k.tech☆12Sep 6, 2020Updated 5 years ago