Alternatives and similar repositories for Open-FPGA

Users that are interested in Open-FPGA are comparing it to the libraries listed below

• flyjancy / CortexM0_SoC
  Cortex M0 based SoC
  ☆75Updated 4 years ago
• Frogwells / fpga_design
  这是我所开发的两个项目，包括ov5640-ddr3-usb2.0高速图像采集系统以及NOIP1SN1300A-ddr3-sdhc高速地表图像采集及存储系统
  ☆96Updated 8 years ago
• lizhirui / AXI-SDCard-High-Speed-Controller
  A SDCard Controller Based AXI4 Bus with SDIO 4-wire 50MHz Mode(Max Rate 23MB/s)
  ☆126Updated 3 years ago
• ic7x24 / verilog-mini-demo
  Verilog极简教程
  ☆36Updated 6 years ago
• NingHeChuan / Digital_Front_End_Verilog
  ☆23Updated 6 years ago
• loykylewong / FPGA-Application-Development-and-Simulation
  《FPGA应用开发和仿真》（机械工业出版社2018年第1版 ISBN:9787111582786）的源码。Source Code of the book FPGA Application Development and Simulation(CHS).
  ☆133Updated last week
• cjhonlyone / picorv32_Xilinx
  A picorv32-riscv Soc with DMAC and Ethernet controller & lwip & Kirtex7@333MHz
  ☆77Updated 4 years ago
• PulseRain / Reindeer
  PulseRain Reindeer - RISCV RV32I[M] Soft CPU
  ☆128Updated 6 years ago
• xupsh / Digital-Design-Reference-Design
  ☆24Updated 9 years ago
• microdynamics-cpu / tree-core-ide
  The next generation integrated development environment for processor design and verification. It has multi-hardware language support, o…
  ☆113Updated 3 years ago
• ljgibbslf / SM3_core
  ☆144Updated 5 years ago
• thuCGRA / SpinalHDL_Chinese_Doc
  Translated SpinalHDL-Doc(v1.7.2) into Chinese
  ☆51Updated 2 years ago
• ahmedshahein / DSP-RTL-Lib
  RTL Verilog library for various DSP modules
  ☆93Updated 3 years ago
• WayneGong / Image_Rotate
  视频旋转（2019FPGA大赛）
  ☆37Updated 5 years ago
• lizhirui / AXI_spec_chinese
  AXI协议规范中文翻译版
  ☆171Updated 3 years ago
• wuzeyou / Multiplier16X16
  Classic Booth Code, Wallace Tree, and SquareRoot Carry Select Adder
  ☆121Updated 12 years ago
• jijingg / Spinal-bootcamp
  SpinalHDL-tutorial based on Jupyter Notebook
  ☆148Updated last year
• BitOpenFPGA / arl
  lists of most popular repositories for most favoured programming languages (according to StackOverflow)
  ☆81Updated 5 years ago
• freecores / jpegencode
  JPEG Encoder Verilog
  ☆79Updated 3 years ago
• Lianghao-Yuan / AHB_Bus_Matrix
  ☆38Updated 10 years ago
• freecores / dma_ahb
  AHB DMA 32 / 64 bits
  ☆57Updated 11 years ago
• cjhonlyone / NandFlashController
  AXI Interface Nand Flash Controller (Sync mode)
  ☆99Updated last year
• suisuisi / FPGAandImage
  image processing based FPGA
  ☆115Updated 4 years ago
• DexWen / FFT_Verilog
  FFT implement by verilog_测试验证已通过
  ☆59Updated 9 years ago
• sunyata000 / PODES-M0O
  A VerilogHDL MCU Core based ARMv6 Cortex-M0
  ☆21Updated 5 years ago
• zion-group / VerilogCodingStyle
  ☆65Updated 5 years ago
• xiaoerlang0359 / E203plus
  upgrade to e203 (a risc-v core)
  ☆45Updated 5 years ago
• ultraembedded / core_sdram_axi4
  SDRAM controller with AXI4 interface
  ☆100Updated 6 years ago
• xupsh / ZynqBook
  基于Xilinx Zynq 嵌入式软硬件协同设计实战指南
  ☆86Updated 10 years ago
• suisuisi / FPGAandPeripheralInterface
  Peripheral Interface of FPGA
  ☆41Updated 4 years ago