Two Verilog SPI module implementations (hard and soft) with advanced options and AXI Full Interface
☆22Nov 21, 2017Updated 8 years ago
Alternatives and similar repositories for QuickSPI
Users that are interested in QuickSPI are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- A Xilinx IP Core and App for line scanner image capture and store☆11Sep 5, 2017Updated 9 years ago
- A collection of SPI related cores☆23Nov 12, 2024Updated last year
- A collection of debugging busses developed and presented at zipcpu.com☆45Jan 18, 2024Updated 2 years ago
- A 32 point radix-2 FFT module written in Verilog☆25Jun 28, 2020Updated 6 years ago
- ☆26Oct 8, 2019Updated 6 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- The controller is a Verilog implementation through a state machine structure per Micro datasheet specifications, and connected to a prede…☆25Jul 6, 2018Updated 8 years ago
- USB -> AXI Debug Bridge☆47Jun 5, 2021Updated 5 years ago
- ESnet general-purpose FPGA design library.☆14Sep 3, 2026Updated 2 weeks ago
- Various projects of SPI loader module for xilinx fpga☆34Jul 20, 2020Updated 6 years ago
- This is a SPI Master Module Written in Verilog☆14Aug 9, 2018Updated 8 years ago
- AXI3 Bus Functional Models (Initiator & Target)☆30Dec 26, 2022Updated 3 years ago
- SPI-Flash XIP Interface (Verilog)☆52Oct 24, 2021Updated 4 years ago
- USB 2.0 FS Device controller IP core written in SystemVerilog☆42Dec 2, 2018Updated 7 years ago
- USB 1.1 Host and Function IP core☆27Jul 17, 2014Updated 12 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- ☆20Jun 18, 2022Updated 4 years ago
- 适用于FPGA——利用串口通信接收幅度频率信息数据帧,控制DA输出相应正弦信号☆10Jul 10, 2019Updated 7 years ago
- A complete 65C02 computer with VGA output on a Lattice Ultra Plus FPGA☆29Jun 12, 2019Updated 7 years ago
- A PicoRV32 SoC for the TinyFPGA BX with peripherals designed for building games☆24Nov 15, 2018Updated 7 years ago
- APB Logic☆29Sep 14, 2026Updated last week
- Verilog RS232 Enhanced Synch-UART & RS232 Debugger HDL core with PC host RS232 real-time Hex-editor / viewer host utility.☆13Jan 15, 2022Updated 4 years ago
- RISC-V Nox core☆72Jul 22, 2025Updated last year
- Mega/Xmega soft core RTL design.☆11Feb 21, 2020Updated 6 years ago
- ☆13May 21, 2019Updated 7 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Implementation of a binary search tree algorithm in a FPGA/ASIC IP☆21Sep 5, 2021Updated 5 years ago
- [READ ONLY] Subtree split of the siyuan-packages-monorepo (see https://github.com/Zuoqiu-Yingyi/siyuan-packages-monorepo)☆12Updated this week
- A 4x4x4 Tic-Tac-Toe game suitable for porting to embedded hardware platforms☆11Sep 6, 2017Updated 9 years ago
- Verilog FPGA code : including experimental DSP audio processor☆14Dec 1, 2020Updated 5 years ago
- A pipelined brainfuck softcore in Verilog☆20Aug 5, 2014Updated 12 years ago
- SPI通信实现FLASH读写☆17Mar 18, 2020Updated 6 years ago
- Basic USB-CDC device core (Verilog)☆94May 15, 2021Updated 5 years ago
- Generic AXI master stub☆20Jul 17, 2014Updated 12 years ago
- Uses the D8M camera module, then processes the image to detect red objects, and then overlay an x,y crosshair on the largest red object. …☆15Jan 19, 2018Updated 8 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- The TV80 (Verilog) synthesizable soft core of Zilog Z80 (forked from http://opencores.org/project,tv80)☆10Jan 9, 2016Updated 10 years ago
- HDMI + GPU-pipeline + FFT☆15Mar 4, 2016Updated 10 years ago
- Project and presentation for SpaceX Application☆14Jul 21, 2017Updated 9 years ago
- A simple 6502 system built on a Lattice Ultra Plus 5k FPGA☆15Mar 11, 2019Updated 7 years ago
- Maximum Likelihood Expectation Maximization algorithm☆20Apr 18, 2013Updated 13 years ago
- BBC Model B implementation for the Ice40 (myStorm BlackIce)☆12Dec 18, 2017Updated 8 years ago
- ADPCM decoder compatible with OKI 6295☆16Aug 16, 2026Updated last month