Implementation of the Advanced Encryption Standard in Chisel
☆19Apr 18, 2022Updated 4 years ago
Alternatives and similar repositories for aes_chisel
Users that are interested in aes_chisel are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- A coverage library for Chisel designs☆11Mar 12, 2020Updated 6 years ago
- An example of on-boarding a PIO block in with duh and wake☆12Nov 18, 2020Updated 5 years ago
- Chisel implementation of AES☆24Mar 27, 2020Updated 6 years ago
- A soft multimedia/graphics processor prototype in Chisel 3☆11May 3, 2023Updated 3 years ago
- A vector processor implemented in Chisel☆21Aug 3, 2014Updated 11 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Experiments with fixed function renderers and ChiselHDL☆61Updated this week
- Fluid Pipelines☆11May 4, 2018Updated 8 years ago
- Implementation of the Snappy compression algorithm as a RoCC accelerator☆12Jul 29, 2019Updated 6 years ago
- Naive Educational RISC-V -- A simple single-stage RV32I processor☆28Nov 3, 2020Updated 5 years ago
- Iodine: Verifying Constant-Time Execution of Hardware☆18Mar 29, 2021Updated 5 years ago
- For contributions of Chisel IP to the chisel community.☆74Nov 7, 2024Updated last year
- Wake build descriptions of hardware generators☆12Dec 11, 2020Updated 5 years ago
- Verilog AST☆21Dec 2, 2023Updated 2 years ago
- Collection of test cases for Yosys☆17Jan 4, 2022Updated 4 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Chisel wrapper and accelerators for Columbia's Embedded Scalable Platform (ESP)☆25Feb 1, 2020Updated 6 years ago
- compiling DSLs to high-level hardware instructions☆23Nov 8, 2022Updated 3 years ago
- 👾 Design ∪ Hardware☆79Jul 1, 2026Updated 2 weeks ago
- Chisel/Firrtl execution engine☆157Aug 21, 2024Updated last year
- This is my first trial project for designing RISC-V in Chisel☆17Apr 29, 2024Updated 2 years ago
- Automatic generation of architecture-level models for hardware from its RTL design.☆16Apr 12, 2023Updated 3 years ago
- RISCV Core written in Calyx☆17Aug 16, 2024Updated last year
- Security monitor for Keystone Enclave (mirror of riscv-pk). Will be deprecated when openSBI port is ready☆36May 12, 2021Updated 5 years ago
- ☆27Sep 3, 2020Updated 5 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- Fast PnR toolchain for CGRA☆18Jul 26, 2024Updated last year
- high-performance RTL simulator☆195Updated this week
- A simple utility for doing RISC-V HPM perf monitoring.☆18May 8, 2017Updated 9 years ago
- Data-centric defense mechanism against Spectre attacks. (DAC'19)☆11Nov 6, 2019Updated 6 years ago
- hardware (ASIC) DEFLATE designed for low-latency page-granularity memory compression and implemented in Chisel☆16Nov 15, 2024Updated last year
- HDMI core in Chisel HDL☆54Mar 8, 2024Updated 2 years ago
- An executable specification of the RISCV ISA in L3.☆44Mar 1, 2019Updated 7 years ago
- ☆106Jun 27, 2022Updated 4 years ago
- Z-scale Microarchitectural Implementation of RV32 ISA☆55May 30, 2017Updated 9 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- PDF to JSON, JSON to PDF and etc.☆12Apr 18, 2018Updated 8 years ago
- BFM Tester for Chisel HDL☆14Nov 27, 2021Updated 4 years ago
- A collection of datapath circuit design and verification benchmarks☆19Jul 9, 2026Updated last week
- Standard HyperRAM core for ECP5 written in Litex/Migen☆14Dec 6, 2019Updated 6 years ago
- Single, dual, quad, eight, and sixteen-shader GP-GPU-Compute engines, along with 32-bit SYMPL RISC CPU and Coarse-Grained Scheduler, in o…☆22Jan 2, 2019Updated 7 years ago
- eyeriss-chisel3☆41May 2, 2022Updated 4 years ago
- Fork of seldridge/rocket-rocc-examples with tests for a systolic array based matmul accelerator☆65Jun 27, 2025Updated last year