hplp / aes_chiselLinks
Implementation of the Advanced Encryption Standard in Chisel
☆20Updated 3 years ago
Alternatives and similar repositories for aes_chisel
Users that are interested in aes_chisel are comparing it to the libraries listed below
Sorting:
- A fault-injection framework using Chisel and FIRRTL☆37Updated 3 months ago
- Useful utilities for BAR projects☆32Updated last year
- CHIPKIT: An agile, reusable open-source framework for rapid test chip development☆41Updated 5 years ago
- For contributions of Chisel IP to the chisel community.☆65Updated 9 months ago
- Provides dot visualizations of chisel/firrtl circuites☆13Updated 6 years ago
- DASS HLS Compiler☆29Updated last year
- ☆28Updated 7 years ago
- Chisel implementation of AES☆23Updated 5 years ago
- AutoSVA is a tool to automatically generate formal testbenches for unit-level RTL verification. The goal is to, based on annotations made…☆88Updated last year
- Chisel wrapper and accelerators for Columbia's Embedded Scalable Platform (ESP)☆24Updated 5 years ago
- A 32-bit RISC-V Processor Designed with High-Level Synthesis☆54Updated 5 years ago
- ☆12Updated 4 years ago
- Collection of test cases for Yosys☆18Updated 3 years ago
- A configurable SRAM generator☆53Updated this week
- Fluid Pipelines☆11Updated 7 years ago
- ILA Model Database☆23Updated 4 years ago
- Runtime-First FPGA Interchange Routing Contest @ FPGA’24☆33Updated 2 months ago
- Papers, Posters, Presentations, Documentation...☆19Updated last year
- Rapidly deploy Chisel and Vivado HLS accelerators on Xilinx PYNQ☆33Updated 6 years ago
- A vector processor implemented in Chisel☆21Updated 11 years ago
- AXI Adapter(s) for RISC-V Atomic Operations☆66Updated last week
- ☆20Updated 5 years ago
- This document adopts the method from the XAPP1230 for doing readback capture on Xilinx UltraScale devices and shows how to migrate the sa…☆16Updated 5 years ago
- YosysHQ SVA AXI Properties☆42Updated 2 years ago
- (System)Verilog to Chisel translator☆116Updated 3 years ago
- Debuggable hardware generator☆69Updated 2 years ago
- ☆103Updated 3 years ago
- A Rocket-based RISC-V superscalar in-order core☆35Updated 3 months ago
- NOCulator is a network-on-chip simulator providing cycle-accurate performance models for a wide variety of networks (mesh, torus, ring, h…☆26Updated 2 years ago
- ☆56Updated 3 years ago