A Java framework focused on rapid prototyping of new CAD algorithms for FPGA compilation.
☆25Dec 17, 2019Updated 6 years ago
Alternatives and similar repositories for FPGA-CAD-Framework
Users that are interested in FPGA-CAD-Framework are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- A Java framework focused on rapid prototyping of new CAD algorithms for FPGA compilation.☆14Aug 5, 2024Updated last year
- RippleFPGA, A Simultaneous Pack-and-Place Algorithm for UltraScale FPGA☆92Feb 11, 2020Updated 6 years ago
- Fine Grain FPGA Overlay Architecture and Tools☆27Nov 5, 2021Updated 4 years ago
- Collection of test cases for Yosys☆17Jan 4, 2022Updated 4 years ago
- HeteroHalide: From Image Processing DSL to Efficient FPGA Acceleration☆15Sep 14, 2020Updated 5 years ago
- Proton VPN Special Offer - Get 70% off • AdSpecial partner offer. Trusted by over 100 million users worldwide. Tested, Approved and Recommended by Experts.
- Next-Generation FPGA Place-and-Route☆10Aug 1, 2018Updated 7 years ago
- TLUT tool flow for parameterised configurations for FPGAs☆17Aug 5, 2024Updated last year
- SDI interface board for the apertus° AXIOM beta camera☆13Jan 19, 2019Updated 7 years ago
- Bitstream Fault Analysis Tool☆15Jul 17, 2023Updated 2 years ago
- A Tcl-based CAD Tool Framework for Xilinx's Vivado Design Suite☆44Oct 21, 2019Updated 6 years ago
- [FPGA 2022, Best Paper Award] Parallel placement and routing of Vivado HLS dataflow designs.☆129Dec 20, 2022Updated 3 years ago
- A low cost FPGA development board for absolute newbies☆18Jan 2, 2019Updated 7 years ago
- A unified programming framework for high and portable performance across FPGAs and GPUs☆11Mar 23, 2025Updated last year
- Wishbone bridge over SPI☆11Nov 13, 2019Updated 6 years ago
- GPUs on demand by Runpod - Special Offer Available • AdRun AI, ML, and HPC workloads on powerful cloud GPUs—without limits or wasted spend. Deploy GPUs in under a minute and pay by the second.
- ☆36Aug 23, 2022Updated 3 years ago
- photonSDI - an open source SDI core☆10May 26, 2021Updated 4 years ago
- Project 1.1 Simulate a Skywater 130nm standard cell using ngspice☆14Jul 18, 2025Updated 9 months ago
- CPOL=0, CPHA=0 SPI core for practicing formal verification with yosys☆21May 20, 2020Updated 5 years ago
- RapidLayout: Fast Hard Block Placement of FPGA-Optimized Systolic Arrays using Evolutionary Algorithms☆19Nov 26, 2020Updated 5 years ago
- A flexible framework for analyzing and transforming FPGA netlists. Official repository.☆112Apr 27, 2026Updated last week
- NetCracker is an FPGA architecture analysis tool for facilitating the investigation of connectivity patterns within as well as in between…☆18Dec 4, 2020Updated 5 years ago
- Build Customized FPGA Implementations for Vivado☆371Apr 29, 2026Updated last week
- gateware for the main fpga, including a hispi decoder and image processing☆13Sep 27, 2018Updated 7 years ago
- Open source password manager - Proton Pass • AdSecurely store, share, and autofill your credentials with Proton Pass, the end-to-end encrypted password manager trusted by millions.
- FPGA Portable Music Generator☆11Aug 1, 2018Updated 7 years ago
- ☆14Aug 27, 2020Updated 5 years ago
- Small footprint and configurable HyperBus core☆14Jul 6, 2022Updated 3 years ago
- USB Full-Speed core written in migen/LiteX☆12Sep 19, 2019Updated 6 years ago
- Tatum: A Fast, Flexible Static Timing Analysis (STA) Engine for Digital Circuits☆62Apr 8, 2026Updated last month
- A library to parse BLIF (Berkeley Logic Interchange Format) files.☆10Mar 11, 2015Updated 11 years ago
- a project to check the FOSS synthesizers against vendors EDA tools☆12Sep 26, 2020Updated 5 years ago
- nextpnr portable FPGA place and route tool☆11Nov 30, 2020Updated 5 years ago
- SD device emulator from ProjectVault☆20Sep 24, 2019Updated 6 years ago
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- Altera MAX V bitstream documentation -- CLEANUP PENDING☆17May 23, 2020Updated 5 years ago
- iCE40 floorplan viewer☆24Jun 23, 2018Updated 7 years ago
- Differentiable Combinatorial Scheduling at Scale (ICML'24). Mingju Liu, Yingjie Li, Jiaqi Yin, Zhiru Zhang, Cunxi Yu.☆22Oct 31, 2024Updated last year
- A bit-serial CPU☆20Sep 29, 2019Updated 6 years ago
- FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.☆306Updated this week
- Verilog to Routing -- Open Source CAD Flow for FPGA Research☆1,226Updated this week
- Proposal to define an XML-based logging format for outputs from EDA tools and logging libraries.☆14Feb 24, 2026Updated 2 months ago