emanueledelsozzo / awesome-fpga-programmingLinks
An awesome curated list of languages and tools to program FPGAs
☆64Updated 3 years ago
Alternatives and similar repositories for awesome-fpga-programming
Users that are interested in awesome-fpga-programming are comparing it to the libraries listed below
Sorting:
- Heterogeneous Research Platform (HERO) for exploration of heterogeneous computers consisting of programmable many-core accelerators and a…☆111Updated last year
- Next generation CGRA generator☆113Updated this week
- ☆33Updated 11 months ago
- Fork of seldridge/rocket-rocc-examples with tests for a systolic array based matmul accelerator☆60Updated 2 months ago
- ☆73Updated last week
- FPGA version of Rodinia in HLS C/C++☆39Updated 4 years ago
- PiDRAM is the first flexible end-to-end framework that enables system integration studies and evaluation of real Processing-using-Memory …☆69Updated last year
- FleetRec: Large-Scale Recommendation Inference on Hybrid GPU-FPGA Clusters☆16Updated 4 years ago
- Hands-on experience programming AI Engines using Vitis Unified Software Platform☆41Updated last year
- Transactional Verilog design and Verilator Testbench for a RISC-V TensorCore Vector co-processor for reproducible linear algebra☆57Updated 3 years ago
- ☆31Updated this week
- A mixed-criticality platform built around Cheshire, with a number of safety/security and predictability features. Ready-to-use FPGA flow …☆110Updated last month
- Algorithmic C Machine Learning Library☆26Updated 8 months ago
- FlexGripPlus: an open-source GPU model for reliability evaluation and micro architectural simulation☆108Updated 2 years ago
- Lectures for the Agile Hardware Design course in Jupyter Notebooks☆105Updated 3 months ago
- 2-8bit weights, 8-bit activations flexible Neural Processing Engine for PULP clusters☆27Updated last week
- ☆60Updated this week
- Introduction to FPGA emulation and digital design. This capstone project was part of the 2021 University of San Diego Shiley-Marcos Schoo…☆49Updated 3 years ago
- TensorCore Vector Processor for Deep Learning - Google Summer of Code Project☆22Updated 4 years ago
- This course provides professors with an understanding of high-level synthesis design methodologies necessary to develop digital systems u…☆54Updated 7 years ago
- A GPU acceleration flow for RTL simulation with batch stimulus☆113Updated last year
- [FPGA 2022, Best Paper Award] Parallel placement and routing of Vivado HLS dataflow designs.☆127Updated 2 years ago
- PAAS: A System Level Simulator for Heterogeneous (CPU-FPGA) Computing Systems☆43Updated 4 years ago
- Technology dependent cells instantiated in the design for generic process (simulation, FPGA)☆65Updated 7 months ago
- Tutorials on HLS Design☆52Updated 5 years ago
- Introductory examples for using PYNQ with Alveo☆51Updated 2 years ago
- A modular, parametrizable, and highly flexible Data Movement Accelerator (DMA)☆177Updated this week
- A 32-bit RISC-V Processor Designed with High-Level Synthesis☆54Updated 5 years ago
- Pulp virtual platform☆23Updated last month
- DHLS (Dynamic High-Level Synthesis) compiler based on MLIR☆129Updated this week