A research shell for Alveo V80
☆44Aug 28, 2026Updated this week
Alternatives and similar repositories for SLASH
Users that are interested in SLASH are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Ready-to-link, packaged Aurora IP on four QSFP28 lanes, providing 100Gb/s throughput, flow control and status monitoring☆18Aug 14, 2026Updated 2 weeks ago
- Alveo Collective Communication Library: MPI-like communication operations for Xilinx Alveo accelerators☆110Jun 30, 2025Updated last year
- [FCCM 2023] PASTA: Programming and Automation Support for Scalable Task-Parallel HLS Programs on Modern Multi-Die FPGAs☆14Jun 26, 2025Updated last year
- ☆14Feb 14, 2022Updated 4 years ago
- Alveo Versal Example Design☆70Jun 11, 2026Updated 2 months ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- TAIDL: Tensor Accelerator ISA Definition Language☆19Apr 28, 2026Updated 4 months ago
- XtraMAC code repo (Accepted by ISCA2026)☆25May 6, 2026Updated 3 months ago
- Open-source AI acceleration on FPGA: from ONNX to RTL☆58Updated this week
- ☆15May 23, 2024Updated 2 years ago
- Differentiable Combinatorial Scheduling at Scale (ICML'24). Mingju Liu, Yingjie Li, Jiaqi Yin, Zhiru Zhang, Cunxi Yu.☆24Oct 31, 2024Updated last year
- FINN+ is an extended version of FINN, a dataflow compiler for QNN inference on FPGAs. It is maintained by a group of researchers at Pader…☆57Updated this week
- ☆18Feb 25, 2026Updated 6 months ago
- Composable HLS library for rapid development of LLM accelerators. FlexLLM enables spatial-temporal hybrid architectures, with parameteriz…☆28Aug 17, 2026Updated last week
- An accelerator to which you can offload RE matching☆14Dec 22, 2024Updated last year
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- Heterogeneous Accelerated Computed Cluster (HACC) Resources Page☆22Jun 30, 2026Updated 2 months ago
- Alkali is a MLIR-based compiler infrastructure for SmartNICs. It allows developers to write target-independent programs, with the compile…☆29Sep 28, 2025Updated 11 months ago
- MEEP FPGA Shell project, currently supporting Alveos u280 and u55c☆17Mar 14, 2024Updated 2 years ago
- OpenNTT is a standalone tool to automatically generate NTT and FFT hardware accelerators☆32Nov 14, 2025Updated 9 months ago
- Control Logic Synthesis: Drawing the Rest of the OWL☆13Jun 17, 2024Updated 2 years ago
- ☆13Apr 15, 2025Updated last year
- Using e-graphs for logic synthesis (ICCAD'25)☆36Updated this week
- ☆41Aug 10, 2026Updated 2 weeks ago
- A unified programming framework for high and portable performance across FPGAs and GPUs☆11Mar 23, 2025Updated last year
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- DFVG: A Heterogeneous Architecture for Speculative Decoding with Draft-on-FPGA and Verify-on-GPU.☆28Nov 26, 2025Updated 9 months ago
- Framework providing operating system abstractions and a range of shared networking and memory services for common modern heterogeneous pl…☆447Aug 3, 2026Updated 3 weeks ago
- [ASPLOS'26] HILOS: A Cost-Effective Near-Storage Processing Solution for Offline Inference of Long-Context LLMs☆22Jan 18, 2026Updated 7 months ago
- Hands-on experience programming AI Engines using Vitis Unified Software Platform☆42Jul 24, 2024Updated 2 years ago
- ARIES: An Agile MLIR-Based Compilation Flow for Reconfigurable Devices with AI Engines (FPGA 2025 Best Paper Nominee)☆66Mar 8, 2026Updated 5 months ago
- [DATE'2025, TCAD'2025] Terafly : A Multi-Node FPGA Based Accelerator Design for Efficient Cooperative Inference in LLMs☆39Nov 13, 2025Updated 9 months ago
- Hands-on experience using the Vitis unified software platform with Xilinx FPGA hardware☆49Jul 24, 2024Updated 2 years ago
- [FCCM 2026] Official repository for LUT-LLM: Efficient Language Model Inference with Memory-based Computation on FPGAs☆44Apr 12, 2026Updated 4 months ago
- ☆18Aug 10, 2026Updated 2 weeks ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Vitis HLS Library for FINN☆227May 27, 2026Updated 3 months ago
- Complete UCIe v2.0 Controller RTL Implementation with Revolutionary 128 Gbps PAM4 Signaling - Architecture Design Complete, Ready for RTL…☆37Aug 30, 2025Updated last year
- Project Details of Vehicle Tracking System☆10Apr 21, 2017Updated 9 years ago
- SmoothE: Differentiable E-Graph Extraction (ASPLOS'25 Best Paper)☆35Jan 15, 2026Updated 7 months ago
- AUP Learning Cloud is a customized JupyterHub platform that delivers an intuitive, hands‑on AI learning experience with AMD‑accelerated t…☆54Updated this week
- FPGA 2025 SAT Accel: A modern SAT Solver on FPGA Repository☆14Mar 13, 2025Updated last year
- A fast, accurate trace-based simulator for High-Level Synthesis.☆77Dec 19, 2025Updated 8 months ago