Marco-Winzker / NN_RGB_FPGA
FPGA Design of a Neural Network for Color Detection
☆75Updated 8 months ago
Alternatives and similar repositories for NN_RGB_FPGA:
Users that are interested in NN_RGB_FPGA are comparing it to the libraries listed below
- This repository hosts the code for an FPGA based accelerator for convolutional neural networks☆137Updated 7 months ago
- SystemVerilog HDL and TB code Deep Neural Network Hardware Accelerator implementation on zybo 7010 FPGA and also C code for Vivado SDK So…☆100Updated 4 years ago
- 32-Bit Algorithms of Floating Point Operations are implemented on Verilog with logic Operations.☆77Updated 5 years ago
- Implementation of CNN using Verilog☆200Updated 7 years ago
- Synthesizable RTL-Based video stream Convolutional Neural Network ( non HLS )☆53Updated 2 months ago
- Learn about image processing with an FPGA. Video lectures explain algorithm and implementation of lane detection for automotive driving. …☆33Updated 8 months ago
- Verilog Design Examples with self checking testbenches. Half Adder, Full Adder, Mux, ALU, D Flip Flop, Sequence Detector using Mealy mach…☆101Updated last year
- In this workshop, we will delve into the process of designing an Application Specific Integrated Circuit (ASIC) from the Register Transf…☆9Updated 5 months ago
- I present a novel pipelined fast Fourier transform (FFT) architecture which is capable of producing the output sequence in normal order. …☆39Updated last year
- ☆13Updated 2 years ago
- This course gives an introduction to digital design tool flow in Xilinx programmable devices using Vivado® Design software suite☆100Updated 5 years ago
- This XUP course provides an introduction to embedded system design on Zynq using the Xilinx Vivado software suite.☆81Updated last year
- This project was done as a part of RISC-V based MYTH (Microprocessor for you in Thirty Hours) workshop organized by Kunal Ghosh and Steve…☆70Updated last year
- Small-scale Tensor Processing Unit built on an FPGA☆141Updated 5 years ago
- 2 Week digital VLSI SoC design and planning workshop with complete RTL2GDSII flow organised by VSD in collaboration with NASSCOM (Advance…☆14Updated 9 months ago
- UVM and System Verilog Manuals☆39Updated 5 years ago
- Design, implement, and test an Arm Cortex-A-based SoCs on FPGA hardware using functional specifications, standard hardware description an…☆87Updated 6 months ago
- This is a verilog implementation of 4x4 systolic array multiplier☆43Updated 4 years ago
- Documentation for the 5 day workshop: Advanced Physical Design using OpenLane/Sky130☆51Updated 2 years ago
- Architectural design of data router in verilog☆28Updated 5 years ago
- This project aims to design an 32-point FFT (Fast Fourier Transform) based DIT (decimation in time) Butterfly Algorithm with multiple clo…☆48Updated last year
- ☆16Updated last year
- PYNQ Composabe Overlays☆70Updated 7 months ago
- Lecture about FIR filter on an FPGA☆11Updated 8 months ago
- IP operations in verilog (simulation and implementation on ice40)☆55Updated 5 years ago
- Project is about designing a Trained Neural Network on FPGA to classify an Image Input using CNN.☆132Updated 4 years ago
- Real-time streaming of OV7670 camera via VGA with a 640x480 resolution at 30fps☆57Updated 3 years ago
- A 2D convolution hardware implementation written in Verilog☆45Updated 4 years ago
- The project is about building an 8-row by 8-bit 6T SRAM memory array, & a 3-to-8 decoder that's used to access the SRAM array. The layout…☆69Updated 2 years ago
- This repository contains a "Hello World" introduction application to the Xilinx PYNQ framework.☆98Updated 2 years ago