dsdnu / zynetLinks
☆22Updated 5 years ago
Alternatives and similar repositories for zynet
Users that are interested in zynet are comparing it to the libraries listed below
Sorting:
- FPGA Design of a Neural Network for Color Detection☆82Updated last year
- Synthesizable RTL-Based video stream Convolutional Neural Network ( non HLS )☆66Updated last year
- PYNQ support and examples for Kria SOMs☆123Updated last year
- Neural Network for Pattern Recognition on an FPGA. Project for Education. Video lectures explain training of the network and FPGA impleme…☆24Updated last year
- My completed projects from "FPGA Prototyping by Verilog Examples" book by Pong P. Chu☆169Updated 4 years ago
- Image Processing Toolbox in Verilog using Basys3 FPGA☆228Updated 8 months ago
- SystemVerilog HDL and TB code Deep Neural Network Hardware Accelerator implementation on zybo 7010 FPGA and also C code for Vivado SDK So…☆112Updated 5 years ago
- Lecture about FIR filter on an FPGA☆13Updated last year
- Real-time streaming of OV7670 camera via VGA with a 640x480 resolution at 30fps☆73Updated 4 years ago
- PYNQ Composabe Overlays☆74Updated last year
- ☆118Updated 2 years ago
- Learn about image processing with an FPGA. Video lectures explain algorithm and implementation of lane detection for automotive driving. …☆45Updated last year
- This repo is for Efinix TinyML platform, which offers end-to-end flow that facilitates TinyML solution deployment on Efinix FPGAs.☆73Updated last month
- I present a novel pipelined fast Fourier transform (FFT) architecture which is capable of producing the output sequence in normal order. …☆48Updated 2 years ago
- An implementation of the CORDIC algorithm in Verilog.☆109Updated 7 years ago
- Simple 8-bit UART realization on Verilog HDL.☆114Updated last year
- Tutorial of a HW design of MicroBlaze using DDR3 RAM on Arty A7 board; DDR3 RAM speed test application☆69Updated 2 months ago
- Integration on PL side of Zynq7000 for PYNQ framework of common industrial devices (GPIO, I2C, SPI and UART)☆38Updated 4 years ago
- This project was inspired by the efforts of Ben Eater to build an 8 bit computer on a breadboard. Even though this one was not built on a…☆59Updated 3 years ago
- ☆63Updated last year
- The verilog code together with cocotb testbench of BFU unit of a DIF FFT processor☆15Updated 2 years ago
- AUTOMATIC VHDL GENERATION FOR CNN MODELS☆31Updated 3 years ago
- ☆104Updated 2 years ago
- Implementing Different Adder Structures in Verilog☆74Updated 6 years ago
- PYNQ-ZU, AUP UltraScale+ MPSoC academic board☆28Updated 4 months ago
- Pequeno (PQR5) is a 5-stage pipelined in-order RISC-V CPU Core compliant with RV32I ISA.☆134Updated 4 months ago
- A simple implementation of a UART modem in Verilog.☆173Updated 4 years ago
- This XUP course provides an introduction to embedded system design on Zynq using the Xilinx Vivado software suite.☆87Updated 2 years ago
- SystemVerilog for ASIC/FPGA Design & Simulation, with Synopsys Tool Flow☆52Updated 10 months ago
- [BRH YT CHANNEL] This repo contains all the code and ressources you need for the Zynq and other FPGA tutorials, ready to copy and paste.☆69Updated 7 months ago