Stanzzz77 / SNN-NEST_Simulator_2.14.0-xilinx-ZCU102Links
A nest brain simulator based on FPGA(LIF NEURON)
☆14Updated 3 years ago
Alternatives and similar repositories for SNN-NEST_Simulator_2.14.0-xilinx-ZCU102
Users that are interested in SNN-NEST_Simulator_2.14.0-xilinx-ZCU102 are comparing it to the libraries listed below
Sorting:
- SNN on FPGA☆11Updated 3 years ago
- ☆19Updated 4 years ago
- CORDIC-SNN, followed with "Unsupervised learning of digital recognition using STDP" published in 2015, frontiers☆25Updated 5 years ago
- FPGA acceleration of a Spike-Timing-Dependent Plasticity learning algorithm for Spiking Neural Networks☆39Updated 5 years ago
- Framework for radix encoded SNN on FPGA☆15Updated 3 years ago
- The CyNAPSE Neuromorphic Accelerator: A Digital Spiking neural network accelerator written in fully synthesizable verilog HDL☆35Updated 6 years ago
- Hardware implementation of Spiking Neural Network on a PYNQ-Z1 board☆38Updated 6 years ago
- ☆17Updated 4 years ago
- A repository FPGA-friendly SNN models☆33Updated 4 years ago
- HedgeHog Fused Spiking Neural Network Emulator/Compute Engine is a hardware implementation of a SNN designed for implementation in Xilinx…☆60Updated 7 months ago
- [FPL 2021] SyncNN: Evaluating and Accelerating Spiking Neural Networks on FPGAs.☆61Updated 4 years ago
- Spiking Neural Network RTL Implementation☆60Updated 4 years ago
- FPGA based Leaky Integrate and Fire (LIF) neuron model accelerator for PyTorch☆82Updated 3 months ago
- This project aims to develop a novel neuromorphic NoC architecture based on RISC-V ISA to support spiking neural network applications, an…☆21Updated last year
- A three-layer LIF neuron SNN accelerator. The first layer is the input layer and has 784 neurons, that receive the encoded spikes. The se…☆14Updated 2 years ago
- IEEE Transactions on Circuits and Systems I: Efficient FPGA Implementations of Pair and Triplet-based STDP for Neuromorphic Architectures☆26Updated 6 years ago
- ODIN online-learning digital spiking neural network (SNN) processor - HDL source code and documentation.☆193Updated 6 years ago
- ReckOn: A Spiking RNN Processor Enabling On-Chip Learning over Second-Long Timescales - HDL source code and documentation.☆86Updated 3 years ago
- [TCAD'24] This repository contains the source code for the paper "FireFly v2: Advancing Hardware Support for High-Performance Spiking Neu…☆20Updated last year
- Code for the ISCAS23 paper "The Hardware Impact of Quantization and Pruning for Weights in Spiking Neural Networks"☆11Updated 2 years ago
- I will share some useful or interesting papers about neuromorphic processor☆27Updated 8 months ago
- tinyODIN digital spiking neural network (SNN) processor - HDL source code and documentation.☆66Updated 2 years ago
- FPGA Design of a Spiking Neural Network.☆43Updated last year
- The project includes SRAM In Memory Computing Accelerator with updates in design/circuits submitted previously in MPW7, by IITD researche…☆14Updated 2 years ago
- ☆48Updated last year
- SATA_Sim is an energy estimation framework for Backpropagation-Through-Time (BPTT) based Spiking Neural Networks (SNNs) training and infe…☆28Updated last year
- A Spiking Neuron Network Project in Verilog Implementation☆25Updated 7 years ago
- ☆94Updated 5 years ago
- This is the RTL implementation of Shenjing, a low power neuromorphic computing accelerator☆17Updated 5 years ago
- FPGA Implementation of Image Processing for MNIST Dataset Based on Convolutional Neural Network Algorithm (CNN)☆11Updated last year