OpenHEC / SNN-simulator-on-PYNQclusterLinks
☆94Updated 5 years ago
Alternatives and similar repositories for SNN-simulator-on-PYNQcluster
Users that are interested in SNN-simulator-on-PYNQcluster are comparing it to the libraries listed below
Sorting:
- ODIN online-learning digital spiking neural network (SNN) processor - HDL source code and documentation.☆193Updated 6 years ago
- HedgeHog Fused Spiking Neural Network Emulator/Compute Engine is a hardware implementation of a SNN designed for implementation in Xilinx…☆60Updated 7 months ago
- Spiking Neural Network RTL Implementation☆60Updated 4 years ago
- This is a fully parameterized verilog implementation of computation kernels for accleration of the Inference of Convolutional Neural Netw…☆188Updated last year
- [FPL 2021] SyncNN: Evaluating and Accelerating Spiking Neural Networks on FPGAs.☆61Updated 4 years ago
- A repository FPGA-friendly SNN models☆33Updated 4 years ago
- This repository hosts the code for an FPGA based accelerator for convolutional neural networks☆163Updated last year
- Lenet for MNIST handwritten digit recognition using Vivado hls tool☆37Updated 5 years ago
- tinyODIN digital spiking neural network (SNN) processor - HDL source code and documentation.☆66Updated 2 years ago
- FPGA☆158Updated last year
- Convolutional accelerator kernel, target ASIC & FPGA☆229Updated 2 years ago
- FPGA acceleration of a Spike-Timing-Dependent Plasticity learning algorithm for Spiking Neural Networks☆39Updated 5 years ago
- A trained Convolutional Neural Network implemented on ZedBoard Zynq-7000 FPGA.☆98Updated last year
- 中文:☆103Updated 5 years ago
- CNN accelerator implemented with Spinal HDL☆152Updated last year
- Hardware implementation of Spiking Neural Network on a PYNQ-Z1 board☆38Updated 6 years ago
- The CyNAPSE Neuromorphic Accelerator: A Digital Spiking neural network accelerator written in fully synthesizable verilog HDL☆35Updated 6 years ago
- PYNQ-Torch: a framework to develop PyTorch accelerators on the PYNQ platform☆72Updated 5 years ago
- A Spiking neural network simulator NEST base on FPGA‘s cluster(LIF NEURON)☆17Updated 5 years ago
- achieve softmax in PYNQ with heterogeneous computing.☆65Updated 6 years ago
- ☆17Updated 4 years ago
- PYNQ学习资料☆167Updated 5 years ago
- 【入门项目】基于PYNQ-Z2实现手写数字识别卷积神经网络硬件加速器☆167Updated 2 years ago
- Convolutional Neural Network RTL-level Design☆72Updated 3 years ago
- 基于HLS的高效深度卷积神经网络FPGA实现方法☆70Updated 6 years ago
- Convolutional Neural Network Using High Level Synthesis☆88Updated 5 years ago
- An LeNet RTL implement onto FPGA☆49Updated 7 years ago
- ☆48Updated 7 years ago
- A FPGA Based CNN accelerator, following Google's TPU V1.☆160Updated 6 years ago
- A SystemVerilog implementation of Row-Stationary dataflow and Hierarchical Mesh Network-on-Chip Architecture based on Eyeriss CNN Acceler…☆172Updated 5 years ago