Alternatives and similar repositories for BRAIN-M:

Users that are interested in BRAIN-M are comparing it to the libraries listed below

• sfmth / OpenSpike
  Fully opensource spiking neural network accelerator
  ☆133Updated last year
• akilm / Physical-Design
  Physical Design Flow from RTL to GDS using Opensource tools.
  ☆86Updated 4 years ago
• jeshraghian / snn-accelerator
  ☆24Updated 2 years ago
• ChFrenkel / tinyODIN
  tinyODIN digital spiking neural network (SNN) processor - HDL source code and documentation.
  ☆49Updated last year
• SLAM-Lab / SANA-FE
  Simulation of Advanced Neuromorphic Architectures for Fast Exploration
  ☆11Updated 2 months ago
• iammituraj / pequeno_riscv
  Pequeno (PQR5) is a 5-stage pipelined in-order RISC-V CPU Core compliant with RV32I ISA.
  ☆57Updated last month
• efabless / volare
  Version manager (and builder) for the Google sky130 and gf180mcu open-source PDKs
  ☆63Updated last week
• edabk-hust / edabk_brain_soc
  A project dedicated to developing a hardware Integrated Circuit (IC) for a Spike Neural Network (SNN), powered by the RTL code generated …
  ☆41Updated 11 months ago
• stevehoover / RISC-V_MYTH_Workshop
  Accompanying live info and links for VLSI Design Systems and Redwood EDA "Microprocessor for You in Thirty Hours" Workshop
  ☆79Updated last year
• asyncvlsi / act
  ACT hardware description language and core tools.
  ☆105Updated this week
• efabless / caravel_user_project
  https://caravel-user-project.readthedocs.io
  ☆188Updated 3 weeks ago
• asinghani / open-eda-course
  Curriculum for a university course to teach chip design using open source EDA tools
  ☆57Updated last year
• shariethernet / Physical-Design-with-OpenLANE-using-SKY130-PDK
  This project is done in the course of "Advanced Physical Design using OpenLANE/Sky130" workshop by VLSI System Design Corporation. In thi…
  ☆41Updated 3 years ago
• asyncvlsi / actflow
  Top-level repository for the ACT EDA flow
  ☆26Updated this week
• srimanthtenneti / Hell_Fire_SoC_Demo
  ☆18Updated 3 months ago
• efabless / mpw_precheck
  ☆36Updated 3 months ago
• sheldonucr / ee260_lab
  EE 260 Winter 2017: Advanced VLSI Design
  ☆60Updated 8 years ago
• ShonTaware / SRAM_SKY130
  Design of 1024x32 SRAM (32Kbits) using OpenRAM and SKY130 PDKs with operating voltage of 1.8V and access time < 2.5ns
  ☆64Updated 3 years ago
• open-neuromorphic / fpga-snntorch
  Notebooks and code for Neuromorphic Hardware Workshop at ISFPGA 2024.
  ☆39Updated 10 months ago
• der-mur / book1-zynq-intro
  Resources for my first book
  ☆16Updated last year
• kiwih / qtcore-C1
  ☆44Updated last year
• AngeloJacobo / RISC-V
  Design implementation of the RV32I Core in Verilog HDL with Zicsr extension
  ☆76Updated last year
• ncsu-eda / FreePDK3
  ☆130Updated 3 years ago
• shivanishah269 / risc-v-core
  This project was done as a part of RISC-V based MYTH (Microprocessor for you in Thirty Hours) workshop organized by Kunal Ghosh and Steve…
  ☆70Updated last year
• sscs-ose / sscs-ose-code-a-chip.github.io
  IEEE Solid-State Circuits Society (SSCS) Open-Source Ecosystem (OSE)
  ☆164Updated 3 weeks ago
• YucanLiu / VLSI_SNN
  A Spiking Neuron Network Project in Verilog Implementation
  ☆20Updated 6 years ago
• knowm / memristor-models-4-all
  This project aims to be a collaborative effort to collect under one roof all the memristor models published to date.
  ☆112Updated 5 years ago
• The-OpenROAD-Project / megaboom
  ☆24Updated this week
• google / skywater-pdk-libs-sky130_fd_pr_reram
  SKY130 ReRAM and examples (SkyWater Provided)
  ☆36Updated 2 years ago
• sarthak268 / Embedded_Logic_and_Design
  This repository contains all labs done as a part of the Embedded Logic and Design course.
  ☆23Updated 6 years ago