Spiking Neural Network Accelerator
☆15May 18, 2022Updated 4 years ago
Alternatives and similar repositories for Spiking-Neural-Network-Accelerator-EE552-project
Users that are interested in Spiking-Neural-Network-Accelerator-EE552-project are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Deep SNNs with various neural coding methods (rate, phase, burst, TTFS)☆12Feb 15, 2022Updated 4 years ago
- EE577b-Course-Project☆19May 6, 2020Updated 6 years ago
- Pipelined FFT/IFFT 64 points processor☆11Jul 17, 2014Updated 12 years ago
- Multi-bit Synchronization across Clock Domains☆10May 18, 2018Updated 8 years ago
- ☆14Nov 20, 2019Updated 6 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- [ICML 2021] "Auto-NBA: Efficient and Effective Search Over the Joint Space of Networks, Bitwidths, and Accelerators" by Yonggan Fu, Yonga…☆16Jan 3, 2022Updated 4 years ago
- The open-source release of "SpikeHard: Efficiency-Driven Neuromorphic Hardware for Heterogeneous Systems-on-Chip"☆12Oct 7, 2023Updated 3 years ago
- A simple tool to demonstrate the physical design steps of VLSI Design Flow.☆11Dec 13, 2020Updated 5 years ago
- My MSc Thesis: Low Latency Router Microarchitecture for Network-on-Chip Implemented on an FPGA☆13Jun 26, 2018Updated 8 years ago
- A DAG processor and compiler for a tree-based spatial datapath.☆17Aug 24, 2022Updated 4 years ago
- ☆17Sep 15, 2021Updated 5 years ago
- Senior Design☆13Updated this week
- A Barrel design of RV32I☆22Jul 30, 2023Updated 3 years ago
- Hardware and software implementation of Sparsely-active SNNs☆26Mar 6, 2026Updated 8 months ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- RISC-V-5 stage pipelined in verilog☆12Jul 24, 2020Updated 6 years ago
- The project includes SRAM In Memory Computing Accelerator with updates in design/circuits submitted previously in MPW7, by IITD researche…☆16Jan 6, 2023Updated 3 years ago
- Brilliantly Radical Artificially Intelligent Neural Machine☆18Dec 28, 2017Updated 8 years ago
- Code for the ISCAS23 paper "The Hardware Impact of Quantization and Pruning for Weights in Spiking Neural Networks"☆11Apr 20, 2023Updated 3 years ago
- This repo contains the source code of the project "FPGA implementation of BCIs using QCNNs" submitted to the Xilinx Open Hardware Design …☆21Dec 14, 2021Updated 4 years ago
- ☆12Jan 31, 2023Updated 3 years ago
- LLM4DV☆23Sep 30, 2024Updated 2 years ago
- A neural network built in Verilog for the DE1-SoC FPGA board for handwritten digit recognition.☆19Oct 11, 2019Updated 7 years ago
- Who doesn’t dream of a new FPGA family that can provide embedded hard neurons in its silicon architecture fabric instead of the conventio…☆16Jul 4, 2018Updated 8 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Very simple Cortex-M1 SoC design based on ARM DesignStart☆19Jan 25, 2022Updated 4 years ago
- Generate UVM testbench framework template files with Python 3☆26Dec 23, 2019Updated 6 years ago
- Energy-Efficient Inference Accelerator for Memory-Augmented Neural Networks on an FPGA (DATE-19)☆15Jan 29, 2021Updated 5 years ago
- RISC-V Rocket Chip Strap-on-Booster with Fused Universal Neural Network (FuNN) eNNgine☆21Mar 17, 2022Updated 4 years ago
- Fully opensource spiking neural network accelerator☆182Feb 13, 2023Updated 3 years ago
- all kind of notes, I maybe sort this in the future☆13Aug 29, 2025Updated last year
- ☆10Nov 15, 2023Updated 2 years ago
- Slides and material for Xilinx bootcamp☆22Aug 6, 2021Updated 5 years ago
- ☆12Jan 21, 2021Updated 5 years ago
- GPUs on demand by Runpod - Special Offer Available • AdRun AI, ML, and HPC workloads on powerful cloud GPUs—without limits or wasted spend. Deploy GPUs in under a minute and pay by the second.
- Repository collecting papers about neuromorphic hardware, such as ASIC and FPGA implementations of SNNs and stuff.☆226Nov 4, 2023Updated 3 years ago
- A repository FPGA-friendly SNN models☆38Mar 24, 2021Updated 5 years ago
- ETH Computer Architecture - Fall 2020☆13Feb 26, 2021Updated 5 years ago
- 6.823 Advanced Computer Architecture Lab☆14Oct 17, 2016Updated 10 years ago
- The open- MSP430 is an open-source 16-bit microcontroller core written in Verilog, that is compatible with the Texas Instruments MSP430 m…☆20Jan 28, 2022Updated 4 years ago
- 关于深度学习算法、框架、编译器、加速器的一些理解☆16Jul 2, 2022Updated 4 years ago
- SJTU Computer Architecture(1) Hw☆14Jan 12, 2018Updated 8 years ago