dalance / sdc-parserLinks
☆15Updated 4 years ago
Alternatives and similar repositories for sdc-parser
Users that are interested in sdc-parser are comparing it to the libraries listed below
Sorting:
- Tatum: A Fast, Flexible Static Timing Analysis (STA) Engine for Digital Circuits☆63Updated last year
- EDA physical synthesis optimization kit☆64Updated 2 years ago
- A parser for Value Change Dump (VCD) files as specified in the IEEE System Verilog 1800-2012 standard.☆103Updated 3 years ago
- ☆44Updated 6 years ago
- Material for OpenROAD Tutorial at DAC 2020☆46Updated 3 years ago
- EPFL and ISCAS85 combinational benchmark circuits in generic gate verilog☆30Updated 6 years ago
- A Fast C++ Header-only Parser for Standard Parasitic Exchange Format (SPEF).☆59Updated 3 years ago
- Parsing library for BLIF netlists☆19Updated last year
- A Standalone Structural Verilog Parser☆99Updated 3 years ago
- Delay Calculation ToolKit☆32Updated 3 years ago
- Global Router Built for ICCAD Contest 2019☆34Updated 5 years ago
- LEF/DEF-based port of Iowa State's open-source FastRoute 4.1☆59Updated 5 years ago
- A LEF/DEF Utility.☆33Updated 6 years ago
- ☆33Updated 6 years ago
- netlistDB - Intermediate format for digital hardware representation with graph database API☆31Updated 4 years ago
- OpenDesign Flow Database☆17Updated 7 years ago
- ☆109Updated 6 years ago
- DATC Robust Design Flow.☆36Updated 6 years ago
- Source codes and calibration scripts for clock tree synthesis☆40Updated 5 years ago
- DATC RDF☆50Updated 5 years ago
- GPU-based logic synthesis tool☆97Updated 2 months ago
- ☆19Updated 5 years ago
- IDEA project source files☆111Updated 3 months ago
- AMC: Asynchronous Memory Compiler☆52Updated 5 years ago
- Database and Tool Framework for EDA☆123Updated 5 years ago
- ☆98Updated this week
- An open source high level synthesis (HLS) tool built on top of LLVM☆127Updated last year
- A Flex/Bison Parser for the IEEE 1364-2001 Verilog Standard.☆134Updated 6 years ago
- AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BR…☆109Updated last year
- EDA wiki☆53Updated 2 years ago