Deepak42074 / SRAM_IMC_MPW8
The project includes SRAM In Memory Computing Accelerator with updates in design/circuits submitted previously in MPW7, by IITD researchers under the supervision of Prof: Manan Suri (NVM &Neuromorphic Hardware Research Group IIT-Delhi, https://web.iitd.ac.in/~manansuri/).
☆11Updated 2 years ago
Alternatives and similar repositories for SRAM_IMC_MPW8
Users that are interested in SRAM_IMC_MPW8 are comparing it to the libraries listed below
Sorting:
- The CyNAPSE Neuromorphic Accelerator: A Digital Spiking neural network accelerator written in fully synthesizable verilog HDL☆33Updated 5 years ago
- Hardware implementation of Spiking Neural Network on a PYNQ-Z1 board☆36Updated 5 years ago
- tpu-systolic-array-weight-stationary☆24Updated 4 years ago
- A Spiking Neuron Network Project in Verilog Implementation☆22Updated 7 years ago
- tinyODIN digital spiking neural network (SNN) processor - HDL source code and documentation.☆56Updated 2 years ago
- ☆18Updated 4 years ago
- This is the RTL implementation of Shenjing, a low power neuromorphic computing accelerator☆17Updated 5 years ago
- ☆24Updated 2 years ago
- FPGA implement of 8x8 weight stationary systolic array DNN accelerator☆11Updated 4 years ago
- This project aims to develop a novel neuromorphic NoC architecture based on RISC-V ISA to support spiking neural network applications, an…☆21Updated last year
- HedgeHog Fused Spiking Neural Network Emulator/Compute Engine is a hardware implementation of a SNN designed for implementation in Xilinx…☆58Updated 2 months ago
- SystemVerilog files for lab project on a DNN hardware accelerator☆16Updated 3 years ago
- Spiking Neural Network Accelerator☆15Updated 2 years ago
- ☆33Updated 6 years ago
- ☆13Updated 3 years ago
- ☆18Updated 2 years ago
- Convolutional Neural Network Implemented in Verilog for System on Chip☆27Updated 6 years ago
- A final semester based group project for EE4218: Embedded Hardware System Design module in NUS where I worked with my teammate to perform…☆15Updated 2 years ago
- ☆17Updated 4 years ago
- Systolic matrix multiplication kernel implemented on Xilinx PYNQ FPGA board☆14Updated 4 years ago
- [FPL 2021] SyncNN: Evaluating and Accelerating Spiking Neural Networks on FPGAs.☆55Updated 3 years ago
- a Computing In Memory emULATOR framework☆11Updated 11 months ago
- TinyVers Heterogeneous SoC consists of a reconfigurable FlexML accelerator, a RISC-V processor, an eMRAM and a power management system.☆18Updated last year
- CORDIC-SNN, followed with "Unsupervised learning of digital recognition using STDP" published in 2015, frontiers☆23Updated 5 years ago
- A RRAM addon for the NCSU FreePDK 45nm☆23Updated 3 years ago
- 32 - bit floating point Multiplier Accumulator Unit (MAC)☆30Updated 4 years ago
- ☆15Updated last year
- CNN-Accelerator based on FPGA developed by verilog HDL.☆10Updated 3 years ago
- A collection of research papers on SRAM-based compute-in-memory architectures.☆28Updated last year
- Hardware accelerator for convolutional neural networks☆43Updated 2 years ago