Open source tools for IC design
☆14Dec 12, 2024Updated last year
Alternatives and similar repositories for OpenIC
Users that are interested in OpenIC are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Source-Opened RISCV for Crypto☆18Jan 18, 2022Updated 4 years ago
- RV64IMAC modelling using System Verilog HDL☆26Aug 10, 2024Updated last year
- ☆106Nov 30, 2025Updated 6 months ago
- This project shows the design of a frequency synthesizer PLL system that produces a 1.92 GHz signal with a reference input of 30 MHz, wit…☆91Jun 12, 2023Updated 3 years ago
- Interactive Device Simulator☆13Jan 10, 2024Updated 2 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- ☆15Jul 14, 2024Updated last year
- I2C master/slave Core☆15Jul 17, 2014Updated 11 years ago
- ☆19Nov 16, 2020Updated 5 years ago
- Example of an easy way to take cs notes☆11Mar 11, 2021Updated 5 years ago
- Advanced Integrated Circuits 2025☆14Nov 1, 2025Updated 7 months ago
- AHB-lite, AHB-APB bridge and extended APB side architecture in SystemVerilog☆20Sep 2, 2023Updated 2 years ago
- This repository documents my work on Advanced Physical Design Using OpenLANE/Sky130. The objective of this project was to implement an op…☆24Jul 7, 2021Updated 4 years ago
- ☆29Feb 22, 2024Updated 2 years ago
- A Full open-source/Full with Python/ interactive course for all who like to know "What are Communication Circuits?" from scratch to basic…☆12Jan 14, 2024Updated 2 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Tests for the design flow with Synopsys tools for the implementation of a RISC-V processor.☆28Sep 8, 2024Updated last year
- Stabilizer: Rigorous Performance Evaluation☆27Aug 15, 2023Updated 2 years ago
- I2C slave Verilog Design and TestBench☆27May 9, 2019Updated 7 years ago
- Python module for 8B10B encoding and decoding☆12Jul 25, 2023Updated 2 years ago
- This repo shows an implementation of an FPGA from RTL to GDS with open Skywater-130 pdk☆39Jun 2, 2021Updated 5 years ago
- Collection of LeetCode questions to ace the coding interview! - Created using [LeetHub](https://github.com/QasimWani/LeetHub)☆26Mar 30, 2024Updated 2 years ago
- UART implementation using verilog☆38Feb 14, 2023Updated 3 years ago
- An open source PDK using TIGFET 10nm devices.☆59Dec 19, 2022Updated 3 years ago
- Our project involves the design of an 8-bit microprocessor data-path including 8-byte dual port memory, ALU and barrel shifter using CMOS…☆14Jan 2, 2021Updated 5 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- The verilog code together with cocotb testbench of BFU unit of a DIF FFT processor☆15Apr 11, 2023Updated 3 years ago
- AR1010 FM radio module library for Arduino☆19Feb 20, 2012Updated 14 years ago
- Solve one design problem each day for a month☆53Feb 3, 2023Updated 3 years ago
- This project is about building a high FOM 2.4 GHz LNA for Bluetooth Low-Energy (BLE) Standards, using 45nm CMOS technology.☆15Mar 17, 2019Updated 7 years ago
- EmbeddedFab provides Open Source AVR (Atmega32) Library☆14Oct 22, 2015Updated 10 years ago
- This is the base repo for our graduation project in AlexU 21☆28Jul 26, 2021Updated 4 years ago
- a telegram bot built to assist students track their schedule, exams, deadlines and much more!☆49May 13, 2024Updated 2 years ago
- Custom IC Creator Simulation tools☆28May 7, 2026Updated last month
- A command line tool for automating LTspice simulations☆13Nov 12, 2017Updated 8 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- The journey of designing an ASIC (application specific integrated circuit) is long and involves a number of major steps – moving from a c…☆527Jul 18, 2025Updated 11 months ago
- RFCs for changes to Babel☆24Jun 30, 2024Updated last year
- Mirror of tachyon-da cvc Verilog simulator☆55Mar 16, 2026Updated 3 months ago
- A collection of tutorials for the fpgaConvNet framework.☆54Sep 20, 2024Updated last year
- PICSimLab Examples☆29Oct 22, 2025Updated 7 months ago
- ☆38Feb 14, 2023Updated 3 years ago
- The unofficial, open-source app for PoliTo students. Available for mobile, desktop & web.☆13Feb 20, 2024Updated 2 years ago