☆37Jul 15, 2026Updated this week
Alternatives and similar repositories for gdsfill
Users that are interested in gdsfill are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- SpiceBind – spice inside HDL simulator☆58Jun 30, 2025Updated last year
- Blender GDSII Importer with PDK Support☆134Updated this week
- Custom IC Design Platform☆106Updated this week
- Open-source PDK version manager☆56Jul 9, 2026Updated last week
- [WIP] Open-source DFT flow☆40May 9, 2026Updated 2 months ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- A tapeout-ready structure for hierarchical analog design (v0.1).☆26Jan 16, 2026Updated 6 months ago
- Parasitic Extraction for KLayout☆45Jul 1, 2026Updated 2 weeks ago
- An Open-Source Full-Custom Silicon Compiler for High-Performance FPGA Fabrics☆18Updated this week
- Self-contained RTL to GDS flow for simple chip designs☆73Jul 7, 2026Updated last week
- Greyhound on IHP SG13G2 0.13 μm BiCMOS process☆107Jul 1, 2026Updated 2 weeks ago
- ☆63Mar 31, 2025Updated last year
- Elements Software Development Kit☆13Jan 8, 2026Updated 6 months ago
- LunaPnR is a place and router for integrated circuits☆48Feb 11, 2026Updated 5 months ago
- GUI for gds2palace RFIC FEM simulation worklow☆31Mar 15, 2026Updated 4 months ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- End-to-End Open-Source I2C GPIO Expander☆45Mar 22, 2026Updated 3 months ago
- SystemVerilog file list pruner☆18Mar 2, 2026Updated 4 months ago
- A set of rules and recommendations for analog and digital circuit designers.☆31Nov 4, 2024Updated last year
- JAX-based SPICE simulator with OpenVAF Verilog-A support☆22Jul 6, 2026Updated 2 weeks ago
- LibreLane full-chip flow template for IHP SG13G2 OpenPDK☆19Apr 20, 2026Updated 3 months ago
- ☆148Jun 16, 2026Updated last month
- An innovative Verilog-A compiler - reloaded☆45Jun 19, 2026Updated last month
- ElemRV - End-to-end Open-Source RISC-V Microcontroller☆113Jul 4, 2026Updated 2 weeks ago
- RFIC EM simulation: Create AWS Palace model from GDSII layout files☆54Updated this week
- Open source password manager - Proton Pass • AdSecurely store, share, and autofill your credentials with Proton Pass, the end-to-end encrypted password manager trusted by millions.
- An Open-Source Toolchain for Top-Metal IC Art and Ultra-High-Fidelity GDSII Renders☆29Jan 6, 2026Updated 6 months ago
- Characterizer☆38Jun 26, 2026Updated 3 weeks ago
- ☆63Jul 11, 2025Updated last year
- Fabric generator and CAD tools graphical frontend☆18Aug 5, 2025Updated 11 months ago
- Digital Design Equivalence Checking☆78Updated this week
- HeiChips 2025 LibreLane Workshop☆16Aug 25, 2025Updated 10 months ago
- Open-source RTL logic simulator with GPU acceleration (Metal, CUDA, HIP/AMD)☆80Updated this week
- ☆36Jul 13, 2026Updated last week
- An easy-to-use, silicon-proven (e)FPGA generator with an integrated CAD toolchain 🏗️☆279Updated this week
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- ☆33Jan 7, 2025Updated last year
- Examples of analog circuit design with sEKV for the open source IHP 130nm technology☆31Jun 5, 2025Updated last year
- HeiChips 2025 Tapeout on IHP SG13G2 130nm process☆23Apr 10, 2026Updated 3 months ago
- SPARX: An Open-Source, Automated, Programmatically Generated, Frequency-Scalable Six-Port Receiver in 130-nm CMOS☆24Updated this week
- Circulax is a differentiable circuit simulation framework built on JAX, Optimistix and Diffrax☆43Jun 27, 2026Updated 3 weeks ago
- A repository for Known Good Designs (KGDs). Does not contain any design files with NDA-sensitive information.☆41Jun 10, 2021Updated 5 years ago
- Expose what functional RTL benchmarks leave unanswered. Evidence profiles for AI-generated RTL; research collaborators and design partner…☆16Updated this week