☆39Jul 23, 2026Updated last month
Alternatives and similar repositories for gdsfill
Users that are interested in gdsfill are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Blender GDSII Importer with PDK Support☆139Updated this week
- SpiceBind – spice inside HDL simulator☆58Aug 14, 2026Updated 2 weeks ago
- Custom IC Design Platform☆115Updated this week
- Open-source PDK version manager☆59Updated this week
- A novel Design-for-Test flow using LibreLane☆46May 9, 2026Updated 3 months ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- A tapeout-ready structure for hierarchical analog design (v0.1).☆26Jan 16, 2026Updated 7 months ago
- Parasitic Extraction for KLayout☆46Updated this week
- Open Agentic Design Automation - The open agent interface for EDA: Agent–EDA Contract☆23Aug 12, 2026Updated 2 weeks ago
- An Open-Source Full-Custom Silicon Compiler for High-Performance FPGA Fabrics☆18Updated this week
- Self-contained RTL to GDS flow for simple chip designs☆76Jul 7, 2026Updated last month
- Greyhound on IHP SG13G2 0.13 μm BiCMOS process☆107Updated this week
- ☆65Mar 31, 2025Updated last year
- Elements Software Development Kit☆13Jan 8, 2026Updated 7 months ago
- LunaPnR is a place and router for integrated circuits☆47Feb 11, 2026Updated 6 months ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- End-to-End Open-Source I2C GPIO Expander☆45Jul 23, 2026Updated last month
- GUI for gds2palace RFIC FEM simulation worklow☆32Aug 21, 2026Updated last week
- A set of rules and recommendations for analog and digital circuit designers.☆31Nov 4, 2024Updated last year
- LibreLane full-chip flow template for IHP SG13G2 OpenPDK☆20Apr 20, 2026Updated 4 months ago
- ☆17Oct 1, 2024Updated last year
- ☆157Aug 19, 2026Updated last week
- ElemRV - End-to-end Open-Source RISC-V Microcontroller☆143Updated this week
- An Open-Source Toolchain for Top-Metal IC Art and Ultra-High-Fidelity GDSII Renders☆30Updated this week
- JAX-based SPICE simulator with OpenVAF Verilog-A support☆25Aug 19, 2026Updated last week
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- An innovative Verilog-A compiler - reloaded☆47Updated this week
- Characterizer☆39Updated this week
- RFIC EM simulation: Create AWS Palace model from GDSII layout files☆65Aug 21, 2026Updated last week
- Fabric generator and CAD tools graphical frontend☆18Aug 5, 2025Updated last year
- ☆63Jul 11, 2025Updated last year
- Digital Design Equivalence Checking☆101Updated this week
- HeiChips 2025 LibreLane Workshop☆18Aug 25, 2025Updated last year
- Open-source RTL logic simulator with GPU acceleration (Metal, CUDA, HIP/AMD)☆83Aug 10, 2026Updated 2 weeks ago
- ☆39Updated this week
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- An easy-to-use, silicon-proven (e)FPGA generator with an integrated CAD toolchain 🏗️☆286Updated this week
- ☆33Jan 7, 2025Updated last year
- Examples of analog circuit design with sEKV for the open source IHP 130nm technology☆31Jun 5, 2025Updated last year
- HeiChips 2025 Tapeout on IHP SG13G2 130nm process☆23Apr 10, 2026Updated 4 months ago
- SPARX: An Open-Source, Automated, Programmatically Generated, Frequency-Scalable Six-Port Receiver in 130-nm CMOS☆34Updated this week
- SystemVerilog file list pruner☆19Updated this week
- Circulax is a differentiable circuit simulation framework built on JAX, Optimistix and Diffrax☆52Aug 6, 2026Updated 3 weeks ago