YosysHQ / prjpeppercornLinks
Project Peppercorn - GateMate FPGA Bitstream Documentation
☆23Updated this week
Alternatives and similar repositories for prjpeppercorn
Users that are interested in prjpeppercorn are comparing it to the libraries listed below
Sorting:
- Demo of how to use https://github.com/openXC7 tools (yosys+nextpnr-xilinx) to implement the HW side of a custom SoC with RISC-V CPU & our…☆28Updated 6 months ago
- Use ECP5 JTAG port to interact with user design☆31Updated 4 years ago
- Tool to parse yosys and nextpnr logfiles to then plot LUT, flip-flop and maximum frequency stats as your project progresses.☆21Updated last year
- Experiments with Cologne Chip's GateMate FPGA architecture☆15Updated last year
- Drop In USB CDC ACM core for iCE40 FPGA☆34Updated 3 years ago
- Peripheral Component Interconnect has taken Express lane long ago, going for xGbps SerDes. Now (for the first time) in opensource on the …☆16Updated this week
- assorted library of utility cores for amaranth HDL☆95Updated 11 months ago
- Simplified environment for litex☆14Updated 4 years ago
- CologneChip GateMate FPGA Module: GMM-7550☆22Updated 2 weeks ago
- The ILA allows you to perform in-system debugging of your designs on the GateMate FPGA at runtime. All signals of your design inside the …☆52Updated 2 months ago
- Use amaranth-to-litex to simply import Amaranth code into a Litex project.☆15Updated last year
- USB virtual model in C++ for Verilog☆31Updated 10 months ago
- A configurable USB 2.0 device core☆31Updated 5 years ago
- Development board for GateMateA1 CCGM1A1 FPGA from Cologne Chip with PS2 VGA 64Mbit RAM RP2040☆30Updated 8 months ago
- Set up your GitHub Actions workflow with a OSS CAD Suite☆16Updated last year
- 🔥 Technology-agnostic FPGA stress-test: maximum logic utilization and high dynamic power consumption.☆29Updated 3 years ago
- an inverter drawn in magic with makefile to simulate☆26Updated 3 years ago
- Digital systems are clocked. This project is about constructing a high-Q clock by simmering an ordinary quartz crystal in a heavy numeric…☆11Updated 2 weeks ago
- RISC-V Processor written in Amaranth HDL☆39Updated 3 years ago
- Utilities for the ECP5 FPGA☆18Updated 4 years ago
- KiCad Library to make it easy to create both host boards and expansion boards and which are compatible with the Digilent "PMOD" specifica…☆40Updated 4 years ago
- Experimental FPGA project for streaming two MIPI CSI camera streams to an HDMI monitor using a ULX3S FPGA board☆30Updated 2 years ago
- cocotb extension for nMigen☆17Updated 3 years ago
- An experiment for building gateware for the axiom micro / beta using amaranth-hdl☆44Updated 2 months ago
- VS Code based debugger for hardware designs in Amaranth or Verilog☆39Updated 8 months ago
- Spicing up the first and (no longer) the only EU FPGA chip with a flashy new board, loaded with a suite of engaging demos and examples =>…☆67Updated 2 weeks ago
- Quickly update a bitstream with new RAM contents☆15Updated 4 years ago
- CRUVI Standard Specifications☆19Updated last year
- DVI video out example for prjtrellis☆16Updated 6 years ago
- USB DFU bootloader gateware / firmware for FPGAs☆68Updated 10 months ago