Project Peppercorn - GateMate FPGA Bitstream Documentation
☆35Feb 25, 2026Updated last week
Alternatives and similar repositories for prjpeppercorn
Users that are interested in prjpeppercorn are comparing it to the libraries listed below
Sorting:
- Development board for GateMateA1 CCGM1A1 FPGA from Cologne Chip with PS2 VGA 64Mbit RAM RP2040☆37Feb 16, 2026Updated 3 weeks ago
- The ILA allows you to perform in-system debugging of your designs on the GateMate FPGA at runtime. All signals of your design inside the …☆59Nov 14, 2025Updated 3 months ago
- CologneChip GateMate FPGA Module: GMM-7550☆28Jan 17, 2026Updated last month
- Experiments with Cologne Chip's GateMate FPGA architecture☆17Nov 16, 2023Updated 2 years ago
- Simple extension boards for Olimex GateMate FPGA Board☆19Jun 30, 2025Updated 8 months ago
- Hot Reconfiguration Technology demo☆42Aug 23, 2022Updated 3 years ago
- 🔥 Technology-agnostic FPGA stress-test: maximum logic utilization and high dynamic power consumption.☆32Aug 20, 2022Updated 3 years ago
- USB virtual model in C++, co-simulating with Verilog, SystemVerilog and VHDL☆32Oct 15, 2024Updated last year
- LunaPnR is a place and router for integrated circuits☆47Feb 11, 2026Updated 3 weeks ago
- Spicing up the first and (no longer) the only EU FPGA chip with a flashy new board, loaded with a suite of engaging demos and examples =>…☆89Feb 26, 2026Updated last week
- Simplified environment for litex☆14Oct 5, 2020Updated 5 years ago
- Use ECP5 JTAG port to interact with user design☆33Jul 23, 2021Updated 4 years ago
- My pergola FPGA projects☆30Jun 23, 2021Updated 4 years ago
- SNES for MiSTer☆16Sep 5, 2025Updated 6 months ago
- Utilities for the ECP5 FPGA☆17Aug 5, 2021Updated 4 years ago
- Files and documentation for Pico-Dirty-Blaster Workshop☆20Jun 21, 2025Updated 8 months ago
- Ease the Life of Verification Engineers by helping them to analyze and understand failing simulation faster☆11Oct 14, 2021Updated 4 years ago
- Re-coded Gowin GW1N primitives for Verilator use☆21Aug 19, 2022Updated 3 years ago
- A robust, open-source physical layer implementation for FPGA-to-FPGA communication over high-speed serial links of the Quantum Error Corr…☆28Updated this week
- ice40 USB Analyzer☆57Aug 8, 2020Updated 5 years ago
- User-friendly explanation of Yosys options☆113Sep 25, 2021Updated 4 years ago
- NES FPGA implementation synthesized for the ulx3s ecp5 based fpga board☆38Jan 11, 2026Updated last month
- Experiments with Yosys cxxrtl backend☆50Jan 16, 2025Updated last year
- EVEREST: e-Versatile Research Stick for peoples☆36Apr 12, 2023Updated 2 years ago
- USB DFU bootloader gateware / firmware for FPGAs☆71Jan 30, 2026Updated last month
- PicoRV☆43Feb 19, 2020Updated 6 years ago
- Blinking Led Project☆10Aug 29, 2023Updated 2 years ago
- PCIe to .1 inch header breakout☆11Sep 14, 2020Updated 5 years ago
- Take control of your Colorlight FPGA board with LiteX/LiteEth :)☆112Aug 30, 2023Updated 2 years ago
- Top level for the November shuttle☆12Nov 20, 2021Updated 4 years ago
- RISCV CPU implementation tutorial steps for Cologne Chip Gatemate E1, adopted from https://github.com/BrunoLevy/learn-fpga☆16Updated this week
- Read out firmware of some STM32 parts☆13Jul 20, 2025Updated 7 months ago
- Rust proof-of-concept for GPU waveform rendering☆13Jul 22, 2020Updated 5 years ago
- Mirror of https://codeberg.org/ECP5-PCIe/ECP5-PCIe☆102May 16, 2023Updated 2 years ago
- Demo of how to use https://github.com/openXC7 tools (yosys+nextpnr-xilinx) to implement the HW side of a custom SoC with RISC-V CPU & our…☆37Feb 23, 2025Updated last year
- Drop In USB CDC ACM core for iCE40 FPGA☆34Sep 5, 2021Updated 4 years ago
- Projects for the ECPiX-5 - a ECP5 FPGA board.☆14Jul 5, 2020Updated 5 years ago
- Quickly update a bitstream with new RAM contents☆16Jun 8, 2021Updated 4 years ago
- This project contains Verilog designs and a PCB for the implementation of CSI-2 camera interface to HDMI bridge on a Gatemate FPGA from C…☆19Jul 28, 2025Updated 7 months ago