TinyTapeout / tt08-verilog-templateLinks
Submission template for Tiny Tapeout 8 - Verilog HDL Projects
☆18Updated last year
Alternatives and similar repositories for tt08-verilog-template
Users that are interested in tt08-verilog-template are comparing it to the libraries listed below
Sorting:
- SAR ADC on tiny tapeout☆42Updated 5 months ago
- Experimental Tiny Tapeout chip on IHP SG13G2 0.13 μm BiCMOS process☆18Updated 3 months ago
- A current mode buck converter on the SKY130 PDK☆27Updated 4 years ago
- Open source designs developed with IHP 130nm BiCMOS Open Source PDK. Documentation at https://ihp-open-ip.readthedocs.io/en/latest/☆52Updated 3 months ago
- ☆53Updated this week
- Online viewer of Xschem schematic files☆26Updated 7 months ago
- Solving Sudokus using open source formal verification tools☆17Updated 2 years ago
- End-to-End Open-Source I2C GPIO Expander☆32Updated 2 weeks ago
- Fabric generator and CAD tools graphical frontend☆13Updated last month
- ☆39Updated 2 years ago
- tools to help make the most of the limited space we have on the Google sponsored Efabless shuttles☆36Updated 2 years ago
- A mixed-signal system on chip for nanopore-based DNA sequencing☆34Updated 2 years ago
- Greyhound on IHP SG13G2 0.13 μm BiCMOS process☆47Updated last month
- Version manager (and builder) for the Google sky130 and gf180mcu open-source PDKs☆66Updated 3 weeks ago
- A truly opensource camera serial interface. No frills. No backdoors that compromise security. Outstanding signal integrity. Hi-rez video …☆51Updated this week
- Flip flop setup, hold & metastability explorer tool☆36Updated 2 years ago
- This repository is for (pre-)release versions of the Revolution EDA.☆42Updated last month
- An open source PDK using TIGFET 10nm devices.☆49Updated 2 years ago
- tools used by project repos to test configuration, generate OpenLane run summaries and documentation☆23Updated 2 weeks ago
- Time to Digital Converter (TDC)☆31Updated 4 years ago
- submission repository for efabless mpw6 shuttle☆30Updated last year
- A minimal-area RISC-V core with a scalable data path to 1, 2, 4, or 8 bits and manifold variants.☆95Updated last month
- SiliconCompiler Design Gallery☆51Updated last week
- An example of analogue design using open source IC design tools☆29Updated 3 years ago
- Test Chip General Purpose OpAmp using Skywater SKY130 PDK☆18Updated 4 years ago
- An Amateur Radio Transceiver IC (2.4 / 5 / 10 GHz)☆72Updated 3 years ago
- Analog and power building blocks for sky130 pdk☆20Updated 4 years ago
- ☆12Updated last year
- ☆35Updated 8 months ago
- RISC-V SoC Physical Implementation in 180 nm CMOS with a Quark Core Based on FemtoRV32☆47Updated last year