☆21May 8, 2025Updated 11 months ago
Alternatives and similar repositories for qerv
Users that are interested in qerv are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- A Risc-V SoC for Tiny Tapeout☆52Dec 2, 2025Updated 4 months ago
- Scalable Interface for RISC-V ISA Extensions☆25Apr 5, 2026Updated last week
- CMake based hardware build system☆37Apr 1, 2026Updated last week
- Linux on RISC-V on FPGA (LOROF): RV64GC Sv39 Quad-Core Superscalar Out-of-Order Virtual Memory CPU☆17Feb 23, 2026Updated last month
- Repository containing ULX3S blink LED binaries☆13May 16, 2022Updated 3 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- J-core SOC for ice40 FPGA☆20Dec 8, 2019Updated 6 years ago
- Greyhound on IHP SG13G2 0.13 μm BiCMOS process☆89Updated this week
- Small 32-bit RISC-V CPU with a half-width datapath inspired by the 68000☆16Dec 21, 2023Updated 2 years ago
- RISC-V Scratchpad☆76Nov 18, 2022Updated 3 years ago
- LEN5 is a configurable, speculative, out-of-order, 64-bit RISC-V microprocessor targetting etherogeneus systems on chip.☆21Oct 22, 2025Updated 5 months ago
- Like VexRiscv, but, Harder, Better, Faster, Stronger☆216Apr 3, 2026Updated last week
- An Open-Source SCAlable Interface for ISA Extensionsfor RISC-V Processors. New Version:☆17Feb 29, 2024Updated 2 years ago
- The code for an FPGA softcore comparison☆11Jun 21, 2020Updated 5 years ago
- Fabric generator and CAD tools graphical frontend☆18Aug 5, 2025Updated 8 months ago
- Wordpress hosting with auto-scaling - Free Trial • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Sega Mega Drive / Genesis for Tang FPGA boards☆32May 1, 2025Updated 11 months ago
- Atom linter for Verilog/SystemVerilog, using Icarus Verilog, Slang, Verible or Verilator.☆10Jul 12, 2023Updated 2 years ago
- eXtensible Heterogeneous Energy-Efficient Platform based on RISC-V☆257Apr 7, 2026Updated last week
- Delta Sigma DAC FPGA☆47Feb 21, 2025Updated last year
- Wishbone SATA Controller☆25Oct 16, 2025Updated 5 months ago
- NetCracker is an FPGA architecture analysis tool for facilitating the investigation of connectivity patterns within as well as in between…☆17Dec 4, 2020Updated 5 years ago
- SiliconCompiler Design Gallery☆63Apr 7, 2026Updated last week
- Verilog design files and Icestudio file for streaming the OV7670 camera using ULX3S FPGA Board☆23Nov 17, 2021Updated 4 years ago
- An attempt to reverse engineer a bitstream made for an AL3-10 FPGA☆16Jan 6, 2023Updated 3 years ago
- Serverless GPU API endpoints on Runpod - Bonus Credits • AdSkip the infrastructure headaches. Auto-scaling, pay-as-you-go, no-ops approach lets you focus on innovating your application.
- JPEG Compression RTL implementation☆11Aug 19, 2017Updated 8 years ago
- Verilog Implementation of Run Length Encoding for RGB Image Compression☆27Jun 28, 2021Updated 4 years ago
- User-friendly explanation of Yosys options☆113Sep 25, 2021Updated 4 years ago
- ☆18May 1, 2020Updated 5 years ago
- RISC-V vector and tensor compute extensions for Vortex GPGPU acceleration for ML workloads. Optimized for transformer models, CNNs, and g…☆23Apr 25, 2025Updated 11 months ago
- ☆15Jan 19, 2024Updated 2 years ago
- A bit-serial CPU written in VHDL, with a simulator written in C.☆136Sep 1, 2024Updated last year
- ☆16Mar 18, 2024Updated 2 years ago
- ☆15Oct 7, 2020Updated 5 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- ☆12Apr 19, 2022Updated 3 years ago
- Final year research project to design a programmable virtual switch based on the specifications of a TSN to be implemented on a TSN netwo…☆13Nov 17, 2020Updated 5 years ago
- An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more☆12Jan 14, 2026Updated 3 months ago
- UVM Python Verification Agents Library☆15Mar 18, 2021Updated 5 years ago
- Fine Tuning Model for different NLP task☆15Jan 22, 2023Updated 3 years ago
- An open-source implementation of the VADL processor description language.☆48Apr 6, 2026Updated last week
- ch32v003 from scratch☆14Apr 13, 2025Updated last year