Alternatives and similar repositories for CoWoS-Guide

Users that are interested in CoWoS-Guide are comparing it to the libraries listed below

• pulp-platform / occamy
  A high-efficiency system-on-chip for floating-point compute workloads.
  ☆35Updated 4 months ago
• bespoke-silicon-group / bsg_replicant
  BSG Replicant: Cosimulation and Emulation Infrastructure for HammerBlade
  ☆33Updated 3 weeks ago
• grayresearch / CX
  Proposed RISC-V Composable Custom Extensions Specification
  ☆71Updated last year
• pulp-platform / hero
  Heterogeneous Research Platform (HERO) for exploration of heterogeneous computers consisting of programmable many-core accelerators and a…
  ☆105Updated last year
• StanfordAHA / lake
  Lake is a framework for generating synthesizable memory modules from a high-level behavioral specification and widely-available memory ma…
  ☆22Updated 2 weeks ago
• najaeda / naja-verilog
  A standalone structural (gate-level) verilog parser
  ☆35Updated 3 weeks ago
• NVlabs / CircuitOps
  ☆80Updated 2 months ago
• pulp-platform / pulp_cluster
  The multi-core cluster of a PULP system.
  ☆97Updated this week
• pulp-platform / bigpulp
  ⛔ DEPRECATED ⛔ RISC-V manycore accelerator for HERO, bigPULP hardware platform
  ☆51Updated 3 years ago
• efabless / volare
  Version manager (and builder) for the Google sky130 and gf180mcu open-source PDKs
  ☆65Updated last week
• chipsalliance / systemc-compiler
  Intel Compiler for SystemC
  ☆23Updated 2 years ago
• spcl / apfp
  FPGA acceleration of arbitrary precision floating point computations.
  ☆40Updated 3 years ago
• zeroasiccorp / umi
  Universal Memory Interface (UMI)
  ☆145Updated this week
• kiwih / qtcore-C1
  ☆44Updated 2 years ago
• bespoke-silicon-group / bsg_bladerunner
  Meta-Repository for Bespoke Silicon Group's Manycore Architecture (A.K.A HammerBlade)
  ☆40Updated 3 weeks ago
• asinghani / 18224-s23-tapeout
  Build infrastructure for class-wide tapeout for 18-224/624 Intro to Open Source Chip Design, Spring 2023
  ☆17Updated last year
• semidynamics / OpenVectorInterface
  Home of the specification to connect SemiDynamic's RISC-V cores to your own RISC-V Vector Unit
  ☆36Updated 3 years ago
• hello-eternity / Cyberrio
  ☆39Updated 2 years ago
• siliconcompiler / lambdapdk
  Library of open source Process Design Kits (PDKs)
  ☆42Updated this week
• pulp-platform / redmule
  ☆62Updated this week
• chipsalliance / aib-phy-generator
  AIB Generator: Analog hardware compiler for AIB PHY
  ☆34Updated 4 years ago
• facebookresearch / veripy
  VeriPy is a python based Verilog/Systemverilog automation tool. It automates ports/wire/reg/logic declarations, sub-module Instantiation,…
  ☆27Updated this week
• os-fpga / Raptor
  Raptor end-to-end FPGA Compiler and GUI
  ☆80Updated 5 months ago
• os-chip-design / os-chip-design
  ☆21Updated 2 years ago
• pulp-platform / pulp-runtime
  Simple runtime for Pulp platforms
  ☆48Updated this week
• lnis-uofu / TIGFET-10nm-PDK
  An open source PDK using TIGFET 10nm devices.
  ☆48Updated 2 years ago
• google / globalfoundries-pdk-libs-gf180mcu_fd_pr
  Primitives for GF180MCU provided by GlobalFoundries.
  ☆50Updated last year
• AMDResearch / Riallto
  The Riallto Open Source Project from AMD
  ☆79Updated last month
• natu4u / GSOC_TensorCore
  TensorCore Vector Processor for Deep Learning - Google Summer of Code Project
  ☆22Updated 3 years ago
• dian-lun-lin / RTLflow
  A GPU acceleration flow for RTL simulation with batch stimulus
  ☆110Updated last year