cogenda / VA-BSIM48Links
Verilog-A implementation of MOSFET model BSIM4.8
☆14Updated 6 years ago
Alternatives and similar repositories for VA-BSIM48
Users that are interested in VA-BSIM48 are comparing it to the libraries listed below
Sorting:
- Minimal SKY130 example with self-checking LVS, DRC, and PEX☆24Updated 5 years ago
- This is the repository of IPs of the group in USC who is developing Analog Mixed-signal Parameter Search Engine (AMPSE). You can download…☆25Updated 2 years ago
- Open-source repository for a standard-cell library characterizer using complete open-source tools☆45Updated last week
- Intel's Analog Detailed Router☆40Updated 6 years ago
- BAG framework☆41Updated last year
- Parametric layout generator for digital, analog and mixed-signal integrated circuits☆69Updated this week
- Verilog-A simulation models☆91Updated 3 months ago
- repository for a bandgap voltage reference in SKY130 technology☆41Updated 3 years ago
- ☆20Updated 4 years ago
- A simple MOSFET model with only 5-DC-parameters for circuit simulation☆50Updated 4 months ago
- skywater 130nm pdk☆40Updated 2 weeks ago
- Circuit Automatic Characterization Engine☆51Updated 11 months ago
- This project presents a 10Gb/s transceiver design using 65nm CMOS process, based on a 10GBASE-KR standard.☆27Updated 6 years ago
- Open source process design kit for 28nm open process☆72Updated last year
- ☆17Updated 3 years ago
- Automatic generation of real number models from analog circuits☆48Updated last year
- This project shows the design process of the main blocks of a typical RX frontend system.☆25Updated 5 years ago
- This project shows the design of two 4-bit current steering DACs, based on Binary and Segmented architectures at VDD=1.8V supply, using h…☆22Updated 8 months ago
- An open source PDK using TIGFET 10nm devices.☆55Updated 3 years ago
- Files for Advanced Integrated Circuits☆36Updated 2 weeks ago
- KLayout technology files for FreePDK45☆23Updated 4 years ago
- Custom IC Design Platform☆44Updated this week
- Sandbox for experimenting with Ngspice and open PDKs in Google Colab☆28Updated last year
- CVC: Circuit Validity Checker. Check for errors in CDL netlist.☆33Updated last month
- LAYout with Gridded Objects v2☆68Updated 7 months ago
- Design of Analog Blocks in Skywaters 130nm meeting corners: different flavors of OTA, BandGap, LDO.☆30Updated 3 years ago
- KLayout technology files for Skywater SKY130☆44Updated 2 years ago
- Arbitrary Cell Generator enables parametrized grid-free circuit layout creation☆17Updated 5 years ago
- ☆33Updated 6 years ago
- Skywater 130nm Klayout Device Generators PDK☆30Updated last year