eldrickm / wakey_wakeyLinks
EE 272B - VLSI Design Project
☆12Updated 4 years ago
Alternatives and similar repositories for wakey_wakey
Users that are interested in wakey_wakey are comparing it to the libraries listed below
Sorting:
- Feed-forward neural networks can be trained based on a gradient-descent based backpropagation algorithm. But, these algorithms require mo…☆12Updated 5 years ago
- Tensor Processing Unit implementation in Verilog☆9Updated 4 months ago
- Hand Writing Digital Recognization Based on FPGA, we desiged a SoC embeded a Cortex M3 core and other peripherals,this SoC run a CNN. The…☆12Updated 2 years ago
- CNN-Accelerator based on FPGA developed by verilog HDL.☆10Updated 3 years ago
- FPGA implement of 8x8 weight stationary systolic array DNN accelerator☆11Updated 4 years ago
- Arrhythmia Detection Using Algorithm and Hardware Co-design for Neural Network Inference Accelerators☆17Updated 2 years ago
- tpu-systolic-array-weight-stationary☆24Updated 4 years ago
- Hardware implementation of Spiking Neural Network on a PYNQ-Z1 board☆36Updated 6 years ago
- A Spiking Neuron Network Project in Verilog Implementation☆23Updated 7 years ago
- Convolutional Neural Network Implemented in Verilog for System on Chip☆27Updated 6 years ago
- A convolutional neural network -using vivado-made as a logic 2 project☆9Updated 5 years ago
- ☆14Updated 2 years ago
- CNN-Accelerator based on FPGA developed by verilog HDL.☆48Updated 5 years ago
- TinyVers Heterogeneous SoC consists of a reconfigurable FlexML accelerator, a RISC-V processor, an eMRAM and a power management system.☆19Updated 2 years ago
- This repository contains full code of Softmax Layer in Verilog☆18Updated 4 years ago
- Used FPGA board and System Verilog to design controller, DMA, pipelined SIMD processor, and GEMM accelerator☆10Updated last year
- SystemVerilog files for lab project on a DNN hardware accelerator☆16Updated 4 years ago
- CNN hardware accelerator to accelerate quantized LeNet-5 model☆38Updated last year
- Systolic array based simple TPU for CNN on PYNQ-Z2☆34Updated 3 years ago
- Hardware accelerator for convolutional neural networks☆47Updated 2 years ago
- CNN Accelerator in Frequency Domain☆12Updated 5 years ago
- Single Long Short Term Memory (LSTM) cell : Verilog Implementation☆32Updated 5 years ago
- DMA controller for CNN accelerator☆13Updated 8 years ago
- The project includes SRAM In Memory Computing Accelerator with updates in design/circuits submitted previously in MPW7, by IITD researche…☆12Updated 2 years ago
- ☆34Updated 6 years ago
- c++ version of ViT☆12Updated 2 years ago
- ☆27Updated 5 years ago
- Efficient FPGA-Based Accelerator for Convolutional Neural Networks☆19Updated 11 months ago
- A systolic array matrix multiplier☆24Updated 5 years ago
- eyeriss-chisel3☆41Updated 3 years ago