C++ and Verilog to implement AES128
☆24Apr 30, 2018Updated 8 years ago
Alternatives and similar repositories for AES128
Users that are interested in AES128 are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Hardware Accelerator for AES 128-bit Encryption and Decryption implemented (in Verilog) in Altera's FPGA board.☆18Dec 16, 2017Updated 8 years ago
- Accelerating the AES algorithm on an FPGA and comparing the speedup with both AES and Modified AES algorithms☆34Dec 10, 2021Updated 4 years ago
- AES-based-on-FPGA developed by verilog.☆23Apr 23, 2020Updated 6 years ago
- EE4415 Project : AES Verilog☆10Apr 25, 2019Updated 7 years ago
- AES-128 Encryption☆11Jul 17, 2014Updated 11 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Hardware Implementation of Advanced Encryption Standard Algorithm in Verilog☆42Jun 4, 2017Updated 8 years ago
- AES☆15Oct 4, 2022Updated 3 years ago
- This project contains synthesized verilog codes for Encryption/Decryption of secure IP stream using Advanced Encryption Standard (AES) al…☆17May 2, 2013Updated 13 years ago
- Implementation of cryptographic algorithm with verilog hdl(such as des,aes,sha,rsa,ecc etc.)☆43Dec 1, 2019Updated 6 years ago
- Advanced encryption standard (AES) algorithm has been widely deployed in cryptographic applications. This work proposes a low power and h…☆22Apr 15, 2021Updated 5 years ago
- Advanced encryption standard (AES128, AES192, AES256) Encryption and Decryption Implementation in Verilog HDL☆141Jul 31, 2022Updated 3 years ago
- Verilog implementation of the symmetric block cipher AES (Advanced Encryption Standard) as specified in NIST FIPS 197. This implementatio…☆432Dec 29, 2025Updated 4 months ago
- Design & Implementation of Multi Clock Domain System using Verilog HDL☆13Oct 4, 2023Updated 2 years ago
- AES implementation on FPGA☆13Apr 17, 2016Updated 10 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Programming assignments for Coursera's U of I VLSI CAD: Logic to Layout☆14May 11, 2014Updated 11 years ago
- TA's implementation for the project of Computer Architecture and Intelligent Chip Design (23 Spring)☆10May 20, 2023Updated 2 years ago
- Using an Altera DE10-Lite FPGA development board to simulate an FFT processor. Audio input frequencies will be visualized onto a VGA disp…☆15May 5, 2020Updated 5 years ago
- Verification of DMA Controller for 8086 Microprocessor Systems using OO Test bench☆17Jun 24, 2020Updated 5 years ago
- LeNet-5 use c achieve☆13Jan 10, 2020Updated 6 years ago
- AES加密解密算法的Verilog实现☆71Jan 17, 2016Updated 10 years ago
- A Fix-pointed Rudimentary CNN Convolution Accelerator☆16Oct 7, 2020Updated 5 years ago
- Golang package for PCI Express data transfers☆13Apr 24, 2018Updated 8 years ago
- FIR band-pass filter using Verilog HDL.☆13Sep 6, 2020Updated 5 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- ☆12Oct 8, 2021Updated 4 years ago
- The goal of this design is to use the PYNQ-Z2 development board to design a general convolution neural network accelerator. And through r…☆11Sep 30, 2020Updated 5 years ago
- SystemVerilog examples and projects☆20Jun 10, 2025Updated 10 months ago
- Studies on basic hardware and software edge detection algorithms for future Stochastic Computing applications☆10Jul 11, 2021Updated 4 years ago
- ☆18Jul 11, 2021Updated 4 years ago
- ☆18May 1, 2024Updated 2 years ago
- A design of 15-order FIR filter using Verilog, with modulation and demodulation system using MATLAB☆10Aug 15, 2020Updated 5 years ago
- This repo is "NTHU VLSI System Design and Implementation" course project.☆13Mar 5, 2017Updated 9 years ago
- Verilog HDL implementation of an ECHO machine and an FIR filter that filters out a specific noise. More details provided in individual fi…☆10Aug 25, 2019Updated 6 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Advanced Machine Learning and Signal Processing IBM☆18Sep 6, 2019Updated 6 years ago
- Verilog Design, Simulation & Synthesis of Digital ASIC Projects☆18Jan 27, 2023Updated 3 years ago
- Implementation of the CMAC keyed hash function using AES as block cipher.☆16Apr 2, 2025Updated last year
- Zedboard projects☆11May 15, 2016Updated 9 years ago
- ☆13Jul 3, 2020Updated 5 years ago
- Package for dynamic programming☆13Jun 23, 2020Updated 5 years ago
- [CVPRW'22] A privacy attack that exploits Adversarial Training models to compromise the privacy of Federated Learning systems.☆12Jul 7, 2022Updated 3 years ago