Alternatives and similar repositories for PYNQ-BOT:

Users that are interested in PYNQ-BOT are comparing it to the libraries listed below

• Xilinx / PYNQ_Composable_Pipeline
  PYNQ Composabe Overlays
  ☆69Updated 7 months ago
• drichmond / PYNQ-HLS
  A Tutorial on Putting High-Level Synthesis cores in PYNQ
  ☆103Updated 6 years ago
• wady101 / Embedded-System-Design-Flow-on-Zynq
  Updated version of the XUP Workshops
  ☆18Updated 6 years ago
• gewuek / vitis_ai_custom_platform_flow
  This project is trying to create a base vitis platform to run with DPU
  ☆47Updated 4 years ago
• StefanSredojevic / Deep-Neural-Network-Hardware-Accelerator
  SystemVerilog HDL and TB code Deep Neural Network Hardware Accelerator implementation on zybo 7010 FPGA and also C code for Vivado SDK So…
  ☆100Updated 4 years ago
• PeterOgden / overlay_tutorial
  Premade bitstreams and block designs to complemented the PYNQ overlay tutorial
  ☆39Updated 3 years ago
• Avnet / Ultra96-PYNQ
  Board files to build Ultra 96 PYNQ image
  ☆153Updated last month
• scale-lab / DRUM
  The Verilog source code for DRUM approximate multiplier.
  ☆29Updated last year
• romulus0914 / CNN_VGG19_verilog
  Convolution Neural Network of vgg19 model in verilog
  ☆45Updated 7 years ago
• sfox14 / pynq-ekf
  A multi-board Extended Kalman Filter (EKF)
  ☆31Updated 6 years ago
• Pieter-Berteloot / PYNQ_Projects
  Pynq projects and guides
  ☆27Updated 6 years ago
• Xilinx / PYNQ-HelloWorld
  This repository contains a "Hello World" introduction application to the Xilinx PYNQ framework.
  ☆96Updated 2 years ago
• Xilinx / LSTM-PYNQ
  ☆88Updated 4 years ago
• ac-optimus / Convolution-using-systolic-arrays
  ☆60Updated 6 years ago
• gju06051 / TPU_HW_Verilog
  ☆13Updated last year
• Xilinx / ResNet50-PYNQ
  Quantized ResNet50 Dataflow Acceleration on Alveo, with PYNQ
  ☆54Updated 3 years ago
• JinChen-tw / pynqz2_dpu140
  This TRD is implement DPU v1.4.0 on PYNQ-Z2 board
  ☆44Updated 4 years ago
• Xilinx / PYNQ_Peripherals
  ☆20Updated 3 years ago
• wbrueckner / cv2pynq
  Python package which accelerates OpenCV image filtering functions for the PYNQ framework
  ☆46Updated 6 years ago
• MakarenaLabs / Xilinx-FPGA-HLS-PYNQ-ALVEO-Flow
  Simple examples for FPGA design using Vivado HLS for high level synthesis and Vivado for bitstream generation.
  ☆27Updated 4 years ago
• g0kul / vcnn
  Verilog Convolutional Neural Network on PYNQ
  ☆28Updated 6 years ago
• Xilinx / PYNQ-Networking
  Networking Overlay on PYNQ
  ☆47Updated 5 years ago
• yuyuranium / FPGA-Project-2022-simple-tpu
  Systolic array based simple TPU for CNN on PYNQ-Z2
  ☆21Updated 2 years ago
• mfarhadi / CNNIOT
  ☆43Updated 6 years ago
• suoglu / Fixed-Floating-Point-Adder-Multiplier
  16-bit Adder Multiplier hardware on Digilent Basys 3
  ☆65Updated last year
• Xilinx / Vitis_Model_Composer
  Vitis Model Composer Examples and Tutorials
  ☆80Updated this week
• onioncc / iSmartDNN
  Light-weighted neural network inference for object detection on small-scale FPGA board
  ☆91Updated 5 years ago
• xupsh / 2019_SummerCamp
  2019 SEU-Xilinx Summer School
  ☆47Updated 5 years ago
• sumilao / Zynq-7000-DPU-TRD
  Zynq-7000 DPU TRD
  ☆44Updated 5 years ago