Alternatives and similar repositories for frame

Users that are interested in frame are comparing it to the libraries listed below

• Accelergy-Project / accelergy-timeloop-infrastructure
  Linux docker for the DNN accelerator exploration infrastructure composed of Accelergy and Timeloop
  ☆57Updated last week
• actlab-genesys / GeneSys
  An open-source parameterizable NPU generator with full-stack multi-target compilation stack for intelligent workloads.
  ☆66Updated last week
• leesou / H2-LLM-ISCA-2025
  H2-LLM: Hardware-Dataflow Co-Exploration for Heterogeneous Hybrid-Bonding-based Low-Batch LLM Inference
  ☆66Updated 5 months ago
• pku-liang / TENET
  An analytical framework that models hardware dataflow of tensor applications on spatial architectures using the relation-centric notation…
  ☆86Updated last year
• ucb-bar / cosa
  A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)
  ☆83Updated 2 years ago
• ConvolutedDog / HyFiSS
  HyFiSS: A Hybrid Fidelity Stall-Aware Simulator for GPGPUs
  ☆36Updated 10 months ago
• Accelergy-Project / micro22-sparseloop-artifact
  MICRO22 artifact evaluation for Sparseloop
  ☆44Updated 3 years ago
• casys-kaist / mNPUsim
  mNPUsim: A Cycle-accurate Multi-core NPU Simulator (IISWC 2023)
  ☆64Updated 10 months ago
• PSAL-POSTECH / ONNXim
  ONNXim is a fast cycle-level simulator that can model multi-core NPUs for DNN inference
  ☆150Updated 8 months ago
• maestro-project / confuciux
  ☆32Updated 4 years ago
• stonne-simulator / stonne
  STONNE: A Simulation Tool for Neural Networks Engines
  ☆139Updated 3 months ago
• SET-Scheduling-Project / GEMINI-HPCA2024
  Open-source Framework for HPCA2024 paper: Gemini: Mapping and Architecture Co-exploration for Large-scale DNN Chiplet Accelerators
  ☆95Updated 5 months ago
• pku-liang / HASCO
  agile hardware-software co-design
  ☆51Updated 3 years ago
• cucapra / EventQueue
  EQueue Dialect
  ☆39Updated 3 years ago
• adam-smnk / Open-CIM-Compiler
  ☆32Updated 4 years ago
• UIUC-ChenLab / ScaleHLS-HIDA
  ☆59Updated 6 months ago
• maeri-project / MAERI_bsv
  MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)
  ☆66Updated 4 years ago
• PolyArch / dsa-framework
  Release of stream-specialization software/hardware stack.
  ☆120Updated 2 years ago
• Aayush-Ankit / puma-simulator
  [ASPLOS 2019] PUMA-simulator provides a detailed simulation model of a dataflow architecture built with NVM (non-volatile memory), and ru…
  ☆67Updated 2 years ago
• kartik-hegde / mindmappings
  A reference implementation of the Mind Mappings Framework.
  ☆30Updated 3 years ago
• PrincetonUniversity / muchiSim
  Simulator framework for analysis of performance, energy consumption, area and cost of multi-node multi-chiplet tile-based manycore design…
  ☆70Updated last year
• isakedo / DNNsim
  ☆35Updated 5 years ago
• diwu1990 / uSystolic-Sim
  A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.
  ☆81Updated 3 years ago
• linghaosong / Sextans
  An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).
  ☆86Updated last year
• hngenc / stellar
  ☆32Updated 11 months ago
• he-actlab / planaria.code
  ☆29Updated 3 years ago
• cornell-zhang / HiSparse
  High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS
  ☆95Updated last year
• CMU-SAFARI / SimplePIM
  SimplePIM is the first high-level programming framework for real-world processing-in-memory (PIM) architectures. Described in the PACT 20…
  ☆28Updated last year
• tsinghua-ideal / spada-sim
  The simulator for SPADA, an SpGEMM accelerator with adaptive dataflow
  ☆38Updated 2 years ago
• hatsu3 / Sanger
  ☆48Updated 4 years ago