Alternatives and similar repositories for frame

Users that are interested in frame are comparing it to the libraries listed below

• Accelergy-Project / accelergy-timeloop-infrastructure
  Linux docker for the DNN accelerator exploration infrastructure composed of Accelergy and Timeloop
  ☆58Updated 2 weeks ago
• adam-smnk / Open-CIM-Compiler
  ☆32Updated 4 years ago
• leesou / H2-LLM-ISCA-2025
  H2-LLM: Hardware-Dataflow Co-Exploration for Heterogeneous Hybrid-Bonding-based Low-Batch LLM Inference
  ☆72Updated 6 months ago
• maestro-project / confuciux
  ☆32Updated 4 years ago
• casys-kaist / mNPUsim
  mNPUsim: A Cycle-accurate Multi-core NPU Simulator (IISWC 2023)
  ☆65Updated this week
• suchandler96 / gem5-NVDLA
  ☆36Updated 7 months ago
• Accelergy-Project / micro22-sparseloop-artifact
  MICRO22 artifact evaluation for Sparseloop
  ☆44Updated 3 years ago
• actlab-genesys / GeneSys
  An open-source parameterizable NPU generator with full-stack multi-target compilation stack for intelligent workloads.
  ☆69Updated last month
• kartik-hegde / mindmappings
  A reference implementation of the Mind Mappings Framework.
  ☆30Updated 3 years ago
• pku-liang / HASCO
  agile hardware-software co-design
  ☆52Updated 3 years ago
• ConvolutedDog / HyFiSS
  HyFiSS: A Hybrid Fidelity Stall-Aware Simulator for GPGPUs
  ☆37Updated 10 months ago
• pku-liang / TENET
  An analytical framework that models hardware dataflow of tensor applications on spatial architectures using the relation-centric notation…
  ☆87Updated last year
• jinhachung / tptpu-sim
  A Toy-Purpose TPU Simulator
  ☆19Updated last year
• linghaosong / Sextans
  An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).
  ☆90Updated last year
• SET-Scheduling-Project / GEMINI-HPCA2024
  Open-source Framework for HPCA2024 paper: Gemini: Mapping and Architecture Co-exploration for Large-scale DNN Chiplet Accelerators
  ☆98Updated 6 months ago
• Aayush-Ankit / puma-simulator
  [ASPLOS 2019] PUMA-simulator provides a detailed simulation model of a dataflow architecture built with NVM (non-volatile memory), and ru…
  ☆67Updated 2 years ago
• ucb-bar / cosa
  A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)
  ☆83Updated 2 years ago
• stonne-simulator / stonne
  STONNE: A Simulation Tool for Neural Networks Engines
  ☆143Updated 4 months ago
• PolyArch / dsagen2
  Domain-Specific Architecture Generator 2
  ☆21Updated 3 years ago
• cornell-zhang / HiSparse
  High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS
  ☆95Updated last year
• PSAL-POSTECH / ONNXim
  ONNXim is a fast cycle-level simulator that can model multi-core NPUs for DNN inference
  ☆157Updated 8 months ago
• hngenc / stellar
  ☆32Updated 11 months ago
• cornell-zhang / allo-pldi24-artifact
  Artifact evaluation of PLDI'24 paper "Allo: A Programming Model for Composable Accelerator Design"
  ☆29Updated last year
• Accelergy-Project / processing-in-memory-design
  ☆25Updated last year
• Zhaoshixin-sky / CIM-MLC
  [ASPLOS 2024] CIM-MLC: A Multi-level Compilation Stack for Computing-In-Memory Accelerators
  ☆48Updated last year
• maestro-project / gamma
  ☆41Updated last year
• isakedo / DNNsim
  ☆35Updated 5 years ago
• KULeuven-MICAS / stream
  Multi-core HW accelerator mapping optimization framework for layer-fused ML workloads.
  ☆61Updated 3 months ago
• stonne-simulator / sst-elements-with-stonne
  STONNE Simulator integrated into SST Simulator
  ☆21Updated last year
• he-actlab / planaria.code
  ☆29Updated 3 years ago