Alternatives and similar repositories for amaranth-yosys

Users that are interested in amaranth-yosys are comparing it to the libraries listed below

• amaranth-lang / amaranth-stdio
  Industry standard I/O for Amaranth HDL
  ☆30Updated last year
• amaranth-lang / rfcs
  RFCs for changes to the Amaranth language and standard components
  ☆18Updated last month
• amaranth-lang / amaranth-soc
  System on Chip toolkit for Amaranth HDL
  ☆97Updated last year
• YoWASP / yosys
  Unofficial Yosys WebAssembly packages
  ☆74Updated this week
• greatscottgadgets / bucatini
  a noodly Amaranth HDL-wrapper for FPGA SerDes' presenting a PIPE PHY interface
  ☆31Updated 3 years ago
• betrusted-io / betrusted-ec
  Betrusted embedded controller (UP5K)
  ☆48Updated last year
• lachlansneff / ligeia
  A replacement for gtkwave, written in Rust with high-performance and larger-than-memory traces in mind.
  ☆19Updated 3 years ago
• prjunnamed / prjcombine
  An FPGA reverse engineering and documentation project
  ☆59Updated 3 weeks ago
• tomverbeure / cxxrtl_eval
  Experiments with Yosys cxxrtl backend
  ☆50Updated 10 months ago
• gatecat / prjoxide
  Documenting Lattice's 28nm FPGA parts
  ☆144Updated last year
• lethalbit / discretize
  A Yosys pass and technology library + scripts for implementing a HDL design in discretie FETs for layout in KiCad
  ☆13Updated last year
• amaranth-lang / playground
  Playground for experimenting with and sharing short Amaranth programs on the web
  ☆19Updated 3 weeks ago
• gatecat / hrt
  Hot Reconfiguration Technology demo
  ☆41Updated 3 years ago
• amaranth-lang / amaranth-boards
  Board definitions for Amaranth HDL
  ☆121Updated 2 months ago
• Kuree / fsim
  Fiber-based SystemVerilog Simulator.
  ☆25Updated 3 years ago
• adamgreig / daqnet
  ☆63Updated 5 years ago
• whitequark / Yumewatari
  妖刀夢渡
  ☆63Updated 6 years ago
• prjunnamed / prjunnamed
  End-to-end synthesis and P&R toolchain
  ☆92Updated 2 months ago
• mattvenn / vga_clock_pcb
  Open source hardware down to the chip level!
  ☆30Updated 4 years ago
• Ravenslofty / yosys-cookbook
  User-friendly explanation of Yosys options
  ☆112Updated 4 years ago
• apertus-open-source-cinema / naps
  An experiment for building gateware for the axiom micro / beta using amaranth-hdl
  ☆45Updated 5 months ago
• YosysHQ / prjtrellis-db
  Project Trellis database
  ☆13Updated 2 months ago
• gatecat / subprime
  ☆16Updated 4 years ago
• amaranth-lang / rtl-debugger
  VS Code based debugger for hardware designs in Amaranth or Verilog
  ☆39Updated 11 months ago
• the6p4c / catgirltogds
  converts catgirls to gds files
  ☆15Updated 4 years ago
• sylefeb / Silixel
  Exploring gate level simulation
  ☆58Updated 6 months ago
• GuzTech / misato
  RISC-V Processor written in Amaranth HDL
  ☆39Updated 3 years ago
• ECP5-PCIe / ECP5-PCIe
  Mirror of https://codeberg.org/ECP5-PCIe/ECP5-PCIe
  ☆102Updated 2 years ago
• RobertBaruch / amaranth-exercises
  ☆25Updated last year
• NyanCAD / Mosaic
  A modern schematic entry and simulation program
  ☆76Updated this week