Alternatives and similar repositories for open-la500

Users that are interested in open-la500 are comparing it to the libraries listed below

• OSCPU / openperf
  ☆11Updated 5 months ago
• isnthzy / lightsss-chiplab
  本项目已被合并至官方Chiplab中
  ☆12Updated 6 months ago
• 1932287243 / NPC_IDE
  This is an IDE for YSYX_NPC debuging
  ☆12Updated 7 months ago
• tastynoob / aura-core
  "aura" my super-scalar O3 cpu core
  ☆24Updated last year
• MrAMS / NagiCore
  顺序单/双发射LA32R处理器 (龙芯杯2024) A LA32R CPU in chisel
  ☆23Updated 8 months ago
• arch-simulator-sig / chisel-env
  Basic chisel difftest environment for RTL design (WIP
  ☆18Updated 4 months ago
• Maxpicca-Li / CDIM
  CQU Dual Issue Machine
  ☆35Updated last year
• isnthzy / nscscc2024-liangyi
  nscscc2024，HPU河南理工大学参赛作品，两仪处理器
  ☆10Updated 11 months ago
• ftppz / ShanghaiTech-YSYX
  Unofficial guide for ysyx students applying to ShanghaiTech University
  ☆22Updated 5 months ago
• puckbee / moli
  ☆27Updated last week
• MaZirui2001 / Zircon
  ☆27Updated 6 months ago
• OpenXiangShan / Deterload
  Xiangshan deterministic workloads generator
  ☆20Updated 2 months ago
• Seeker0472 / ysyx-linux
  给NEMU移植Linux Kernel!
  ☆18Updated 2 months ago
• YSYX-OpenDoc / riscv-isa-manual
  ☆20Updated 2 months ago
• OSCPU / yosys-sta
  ☆74Updated 3 months ago
• MrAMS / verilogModuleAddPrefix
  verilog module add prefix script 可用于ysyx项目添加学号
  ☆13Updated last year
• Heresyrac / Gemmini_doc
  关于移植模型至gemmini的文档
  ☆28Updated 3 years ago
• CmdBlockZQG / rvcore-mini-linux
  Build mini linux for your own RISC-V emulator!
  ☆21Updated 10 months ago
• Tanggling / BOOMCore
  This is a project created and completed by team BOOM(Beihang OO masters).This is a superscalar processor with a 13-stage out-of-order dua…
  ☆16Updated 10 months ago
• Jpz-sdju / trinity
  ☆24Updated this week
• FurryAcetylCoA / gtkwave-filter-process-RISC
  A tool to decode RISC-V and LoongArch and MIPS instructions in gtkwave
  ☆31Updated 3 months ago
• XS-MLVP / picker
  Pick your favorite language to verify your chip.
  ☆60Updated this week
• OpenXiangShan / gsim
  ☆44Updated this week
• OSCPU / chisel-playground
  ☆67Updated 5 months ago
• chipsalliance / rvdecoderdb
  The Scala parser to parse riscv/riscv-opcodes generate
  ☆21Updated last month
• lizhirui / DreamCoreV2
  ☆22Updated 2 years ago
• ysyx-ta / ysyx-summer-readings
  ☆66Updated 11 months ago
• NOP-Processor / NOP-Core
  High performance LA32R out-of-order processor core. (NSCSCC 2023 Special Prize)
  ☆81Updated last year
• zencove-thu / zencove-zoom
  Highly configurable out-of-order MIPS32 processor, capable of booting Linux.
  ☆39Updated 2 years ago
• iFuProcessor / iFuCore
  ☆19Updated 11 months ago