MrAMS / NagiCore
顺序单/双发射LA32R处理器 (龙芯杯2024) A LA32R CPU in chisel
☆19Updated 5 months ago
Alternatives and similar repositories for NagiCore:
Users that are interested in NagiCore are comparing it to the libraries listed below
- 基于difftest改进的CPU敏捷开发框架(龙芯杯2024)☆15Updated 8 months ago
- 2022龙芯杯个人赛三等奖作品☆14Updated last year
- NSCSCC 2023 The Second Prize. TEAM PUA FROM HDU.☆11Updated last month
- 2024年第八届龙芯杯 LA 个人赛二等奖参赛作品☆12Updated 8 months ago
- This is an IDE for YSYX_NPC debuging☆12Updated 4 months ago
- "aura" my super-scalar O3 cpu core☆24Updated 11 months ago
- ☆66Updated 9 months ago
- A tool to decode RISC-V and LoongArch and MIPS instructions in gtkwave☆31Updated 3 weeks ago
- Build mini linux for your own RISC-V emulator!☆19Updated 7 months ago
- 适用于龙芯杯团队赛入门选手的应急cache模块☆26Updated last year
- 2020龙芯杯个人赛 简易双发射60M(含ibuffer)☆35Updated 4 years ago
- ☆25Updated 3 months ago
- A framework for ysyx flow☆11Updated 6 months ago
- Mirror of https://gitee.com/loongson-edu/open-la500.git☆17Updated 4 months ago
- ☆63Updated 2 weeks ago
- Second Prize in NSCSCC 2024. Developed by team NoAXI from Hangzhou Dianzi University.☆16Updated 7 months ago
- ☆18Updated 8 months ago
- Documentation for XiangShan Design☆24Updated last week
- ☆17Updated last month
- The official website of One Student One Chip project.☆10Updated 3 weeks ago
- ☆35Updated last year
- ☆86Updated this week
- 2022年龙芯杯个人赛 单发射110M(含icache)☆45Updated 2 years ago
- 龙芯杯个人赛工具包(适用于个人赛的golden_trace工具)☆52Updated last year
- 本项目已被合并至官方Chiplab中☆12Updated 3 months ago
- A RISC-V core running Debian (and a LoongArch core running Linux).☆22Updated last year
- Basic chisel difftest environment for RTL design (WIP☆18Updated 2 months ago
- verilog module add prefix script 可用于ysyx项目添加学号☆13Updated last year
- ☆64Updated 3 months ago
- ☆21Updated last month