Designing directory cache coherence protocols is complicated because coherence transactions are not atomic in modern multicore processors. A coherence transaction comprises multiple messages, and these messages can interleave with other conflicting coherence transactions initiated by other cores. To overcome this architectural challenge, we pres…
☆16Jan 7, 2022Updated 4 years ago
Alternatives and similar repositories for ProtoGen
Users that are interested in ProtoGen are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ☆15May 13, 2022Updated 4 years ago
- This repository contains the TLA+ specification of the ownership and the reliable commit protocols for transactions in Zeus work that app…☆20Jun 12, 2022Updated 4 years ago
- We solve the two challenges architects face when designing heterogeneous processors with cache coherent shared memory. First, we develop …☆21Jan 7, 2022Updated 4 years ago
- ☆17Sep 20, 2021Updated 4 years ago
- CMurphi mirror: http://mclab.di.uniroma1.it/site/index.php/software/18-cmurphi☆14Jan 22, 2016Updated 10 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- Development area for another repo: Learn_Bluespec_and_RISCV_Design☆13Nov 10, 2025Updated 7 months ago
- Repository used for the master thesis "A Benchmark Suite for Serverless Computing".☆10Dec 10, 2022Updated 3 years ago
- ☆19Feb 18, 2021Updated 5 years ago
- ☆16Nov 28, 2024Updated last year
- yet another model checker☆25Updated this week
- SQL Optimizations using MLIR☆12Apr 5, 2020Updated 6 years ago
- Microbenchmarks and Google Benchmark library☆24Aug 5, 2024Updated last year
- The official NaplesPU hardware code repository☆31Jul 27, 2019Updated 6 years ago
- RISC-V architecture concurrency model litmus tests☆104May 20, 2026Updated 3 weeks ago
- GPUs on demand by Runpod - Special Offer Available • AdRun AI, ML, and HPC workloads on powerful cloud GPUs—without limits or wasted spend. Deploy GPUs in under a minute and pay by the second.
- Enhanced PQOS (Intel RDT Software) with DDIO-related Functionalities☆16May 25, 2022Updated 4 years ago
- RPerf: Accurate Latency Measurement Framework for RDMA☆15Apr 14, 2026Updated 2 months ago
- A behavioural cache model for analysing the cache behaviour under side-channel attack.☆28Jun 25, 2025Updated 11 months ago
- Modular, flexible, cross-platform workload profiling and characterization☆13Mar 1, 2021Updated 5 years ago
- Hermes: a fault-tolerant replication protocol, implemented over RDMA, guaranteeing linearizability and achieving low latency and high thr…☆175Mar 28, 2024Updated 2 years ago
- RISCulator is a RISC-V emulator.☆12Aug 18, 2023Updated 2 years ago
- Makes GNOME's topbar's background gradient.☆11Feb 7, 2026Updated 4 months ago
- GARDENIA: Graph Analytics Repository for Designing Efficient Next-generation Accelerators☆34Apr 3, 2022Updated 4 years ago
- [IPSN 2024] Lifelong Intelligence Beyond the Edge using Hyperdimensional Computing☆13May 16, 2024Updated 2 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- Computational Memory Neural Network Compiler☆11Aug 11, 2021Updated 4 years ago
- Designs, infrastructure, and experiments around Race Logic☆26Jun 25, 2020Updated 5 years ago
- The Juice package for circuits in artificial intelligence, both logic and probabilistic☆12Mar 8, 2022Updated 4 years ago
- A fork of the Sun (Oracle) Solaris based libMicro 0.4.1; see 0.4.1-rh branch.☆28Jun 10, 2020Updated 6 years ago
- An RDMA skew-aware key-value store, which implements the Scale-Out ccNUMA design, to exploit skew in order to increase performance of dat…☆19Jul 1, 2021Updated 4 years ago
- Code for reproducing work of ICML 2019 paper: Memory-Optimal Direct Convolutions for Maximizing Classification Accuracy in Embedded Appli…☆12Jun 8, 2019Updated 7 years ago
- Verilog development and verification project for HOL4☆28Apr 25, 2025Updated last year
- RISC-V BSV Specification☆24Apr 28, 2026Updated last month
- DUTH RISC-V Microprocessor☆26Apr 5, 2026Updated 2 months ago
- Simple, predictable pricing with DigitalOcean hosting • AdAlways know what you'll pay with monthly caps and flat pricing. Enterprise-grade infrastructure trusted by 600k+ customers.
- ☆13Aug 1, 2024Updated last year
- ☆29May 6, 2022Updated 4 years ago
- An open-source Simulation Trace Format specification☆17Jun 4, 2026Updated last week
- pulp_soc is the core building component of PULP based SoCs☆84Mar 10, 2025Updated last year
- PTLsim and QEMU based Computer Architecture Research Simulator☆131Feb 13, 2022Updated 4 years ago
- This is the open-source site for XFDetector (ASPLOS'20)☆11Mar 5, 2021Updated 5 years ago
- DPI module for UART-based console interaction with Verilator simulations☆25Oct 27, 2012Updated 13 years ago