t-crest / patmos-llvmLinks
Port of the LLVM compiler infrastructure to the time-predictable processor Patmos
☆15Updated 5 months ago
Alternatives and similar repositories for patmos-llvm
Users that are interested in patmos-llvm are comparing it to the libraries listed below
Sorting:
- Wrapper shells enabling designs generated by rocket-chip to map onto certain FPGA boards☆19Updated 9 months ago
- RTLCheck☆22Updated 6 years ago
- ☆15Updated 2 years ago
- Amazon F1-inspired Xilinx VCU118 hardware design framework☆12Updated 4 years ago
- A Coq framework to support structural design and proof of hardware cache-coherence protocols☆14Updated 3 years ago
- A low-level intermediate representation for hardware description languages☆28Updated 5 years ago
- COATCheck☆13Updated 6 years ago
- Implements kernels with RISC-V Vector☆22Updated 2 years ago
- A enumerator for MLIR, relying on the information given by IRDL.☆19Updated last week
- Bᴛᴏʀ2MLIR: A Format and Toolchain for Hardware Verification☆15Updated 2 weeks ago
- A Hardware Pipeline Description Language☆46Updated 2 months ago
- Iodine: Verifying Constant-Time Execution of Hardware☆14Updated 4 years ago
- ☆20Updated 5 years ago
- Synthesisable SIMT-style RISC-V GPGPU☆41Updated 2 months ago
- A coverage library for Chisel designs☆11Updated 5 years ago
- A behavioural cache model for analysing the cache behaviour under side-channel attack.☆26Updated 2 months ago
- Memory consistency model checking and test generation library.☆15Updated 8 years ago
- Reference Hardware Implementations of Bit Extract/Deposit Instructions☆25Updated 7 years ago
- TEE hardware - based on the chipyard repository - hardware to accelerate TEE☆24Updated 2 years ago
- Testing processors with Random Instruction Generation☆46Updated 3 weeks ago
- Wrappers for open source FPU hardware implementations.☆34Updated last year
- RTL blocks compatible with the Rocket Chip Generator☆16Updated 5 months ago
- Wrapper for ETH Ariane Core☆21Updated 3 weeks ago
- A survey on architectural simulators focused on CPU caches.☆16Updated 5 years ago
- Run Rocket Chip on VCU128☆30Updated 9 months ago
- The PE for the second generation CGRA (garnet).☆17Updated 4 months ago
- TestFloat release 3☆68Updated 6 months ago
- A fault-injection framework using Chisel and FIRRTL☆37Updated this week
- Verilog AST☆21Updated last year
- CV32E40X Design-Verification environment☆13Updated last year