hukenovs / fp23fftkLinks
Floating point Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source lang. - VHDL).
☆59Updated 2 years ago
Alternatives and similar repositories for fp23fftk
Users that are interested in fp23fftk are comparing it to the libraries listed below
Sorting:
- Fully pipelined Integer Scaled / Unscaled Radix-2 Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source la…☆87Updated 2 years ago
- Raspberry Pi v2 camera (IMX219) to DisplayPort of Ultra96-V2 board through PL☆70Updated 3 years ago
- A collection of demonstration digital filters☆152Updated last year
- Extensible FPGA control platform☆62Updated 2 years ago
- Video Stream Scaler☆40Updated 10 years ago
- An SPI to AXI4-lite bridge for easy interfacing of airhdl register banks with any microcontroller.☆49Updated last year
- An FPGA-based 7-ENOB 600 MSample/s ADC without any External Components☆45Updated 4 years ago
- A highly optimized streaming FFT core based on Bailey's 4-step large FFT algorithm☆113Updated 4 years ago
- Verilog modules required to get the OV7670 camera working☆73Updated 6 years ago
- A fast high-resolution time-to-digital converter in the Red Pitaya Zynq-7010 SoC☆61Updated 3 years ago
- DSP with FPGAs 4. edition ISBN: 978-3-642-45308-3☆59Updated 3 years ago
- Generic FIFO implementation with optional FWFT☆57Updated 5 years ago
- Fixed-point library with bittrue implementations in VHDL (for FPGA) and python (for simulation)☆23Updated 10 months ago
- Collection of all FPGA related PSI libraries in the correct folder strucutre. Each library is included as submodule.☆35Updated last year
- A collection of phase locked loop (PLL) related projects☆106Updated last year
- Verilog digital signal processing components☆141Updated 2 years ago
- Common elements for FPGA Design (FIFOs, RAMs, etc.)☆33Updated 3 months ago
- ☆32Updated 2 years ago
- Fork of OpenCores jpegencode with Cocotb testbench☆44Updated 9 years ago
- Digital Signal Processing and Well-Known Modulations on HDL☆41Updated 2 weeks ago
- A guide to creating custom AXI4 masters using the Xilinx Vivado tools and Bus Functional Models☆34Updated 7 years ago
- 10G Low Latency Ethernet☆54Updated last year
- TCL scripts for FPGA (Xilinx)☆32Updated 2 years ago
- ☆70Updated 3 years ago
- A guide to creating custom AXI-lite slave peripherals using the Xilinx Vivado tools☆40Updated 6 years ago
- I2C Master Verilog module☆34Updated this week
- A truly opensource camera serial interface. No frills. No backdoors that compromise security. Outstanding signal integrity. Hi-rez video …☆48Updated 3 weeks ago
- A series of CORDIC related projects☆107Updated 6 months ago
- LBNL RF controls support HDL libraries. Mirroring LBNL's internal Gitlab repository, which is CI enabled☆60Updated this week
- The verilog code together with cocotb testbench of BFU unit of a DIF FFT processor☆15Updated 2 years ago