Alternatives and similar repositories for blackman_harris_win

Users that are interested in blackman_harris_win are comparing it to the libraries listed below

• lnls-dig / dsp-cores
  Repository containing the DSP gateware cores
  ☆13Updated last week
• m-labs / jesd204b
  JESD204B core for Migen/MiSoC
  ☆35Updated 4 years ago
• tgingold / OpenTDC
  Time to Digital Converter (TDC)
  ☆35Updated 4 years ago
• RHSResearchLLC / xvcd
  Xilinx Virtual Cable Daemon
  ☆20Updated 5 years ago
• HarmonInstruments / verilog
  ☆20Updated 3 years ago
• OpenAutomationTechnologies / VHDL_IP-Cores
  ☆18Updated 5 years ago
• emard / flearadio
  Digital FM Radio Receiver for FPGA
  ☆63Updated 9 years ago
• fcayci / vhdl-axis-uart
  UART to AXI Stream interface written in VHDL
  ☆17Updated 2 years ago
• linuxbest / ahci_mpi
  an sata controller using smallest resource.
  ☆16Updated 11 years ago
• hukenovs / adc_configurator
  ADC configurator to 7-series Xilinx FPGA (has parameters: NCHAN, SERDES MODE, SDR/DDR, DATA WIDTH, DEPTH and so on)
  ☆13Updated 7 years ago
• stnolting / cjtag_bridge
  🔌 Compact JTAG ("cJTAG") to 4-wire JTAG (IEEE 1149.1) bridge.
  ☆24Updated 3 years ago
• benreynwar / fpga-sdrlib
  Verilog modules for software-defined radio.
  ☆18Updated 12 years ago
• tomverbeure / fpga_quick_ram_update
  Quickly update a bitstream with new RAM contents
  ☆15Updated 4 years ago
• juliancoy / openStreamHDL
  VHDL Code for infrastructural blocks (designed for FPGA)
  ☆15Updated 2 years ago
• controlpaths / litefury_rp5
  Conecting the Litefury FPGA accelerator to Raspberry Pi 5 over PCIe gen2 x1
  ☆35Updated last year
• codeshaa / 16-bit-HDLC-using-VHDL
  High level Data Link Layer Control (HDLC) Protocol (16 bit) implementation using VHDL hardware description language.
  ☆29Updated 8 years ago
• jsloan256 / titan
  Altium PCB project for the Titan PCI Express development card. This card uses the Lattice ECP5 FPGA.
  ☆19Updated 10 years ago
• Cognoscan / BoostDSP
  VHDL Library for implementing common DSP functionality.
  ☆30Updated 7 years ago
• VHDPlus / VHDPlus_Libraries_and_Examples
  This is a collection of the built in libraries of the VHDPlus IDE toghether with examples. Commits will be featured in the IDE with futur…
  ☆20Updated last year
• GSI-CS-CO / bel_projects
  GSI Timing Gateware and Tools
  ☆14Updated this week
• GMM-7550 / gmm7550-hardware
  CologneChip GateMate FPGA Module: GMM-7550
  ☆24Updated last week
• Bucknalla / ip_cores
  Verilog IP Cores & Tests
  ☆13Updated 7 years ago
• yrrapt / caravel_amsat_txrx_ic
  ☆30Updated 4 years ago
• Cognoscan / VerilogCogs
  Verilog Modules for DSP functions and other common tasks to make FPGA development easier and more fun.
  ☆20Updated 10 years ago
• controlpaths / cp_som_one
  Artix7 SOM
  ☆18Updated last year
• opalkelly-opensource / design-resources
  A collection of Opal Kelly provided design resources
  ☆17Updated last month
• coralhu123 / KC705-AD9371
  The implementation of AD9371 on KC705
  ☆21Updated 4 months ago
• ZipCPU / arrowzip
  A ZipCPU based demonstration of the MAX1000 FPGA board
  ☆23Updated 4 years ago
• Architech-Silica / HLS-Axi-Master-on-Microzed-with-Yocto-Linux-device-driver
  Creation of a AXI Master and Yocto device driver for Zynq, using High Level Synthesis (HLS) techniques.
  ☆14Updated 10 years ago
• nockieboy / gpu
  Collaborative project to create an advanced GPU, with additional features to flesh-out the peripherals for a home-made, DIY computer.
  ☆16Updated 2 years ago