Alternatives and similar repositories for BoostDSP

Users that are interested in BoostDSP are comparing it to the libraries listed below

• chili-chips-ba / uberClock
  Digital systems are clocked. This project is about constructing a high-Q clock by simmering an ordinary quartz crystal in a heavy numeric…
  ☆17Updated this week
• hVHDL / hVHDL_example_project
  An example project which uses many of the ideas and features of the hVHDL libraries like fixed and floating point math modules and has bu…
  ☆30Updated 9 months ago
• paulscherrerinstitute / psi_fix
  Fixed-point library with bittrue implementations in VHDL (for FPGA) and python (for simulation)
  ☆24Updated last year
• tmeissner / libvhdl
  Library of reusable VHDL components
  ☆28Updated last year
• enclustra / en_cl_fix
  Fixed-point math library with VHDL, Python and MATLAB support
  ☆28Updated 2 weeks ago
• suoto / fpga_cores
  ☆33Updated 2 years ago
• chili-chips-ba / openCologne-PCIE
  The first-ever opensource RTL core for PCIE EndPoint. Without vendor-locked HMs for Data Link, Transaction, Application layers; With stan…
  ☆36Updated this week
• hdlguy / make_for_vivado
  experimentation with gnu make for Xilinx Vivado compilation. dependencies can be complicated.
  ☆23Updated last year
• hdl-registers / hdl-registers
  An open-source HDL register code generator fast enough to run in real time.
  ☆74Updated last week
• antmicro / topwrap
  A Python package for generating HDL wrappers and top modules for HDL sources
  ☆38Updated last week
• tmeissner / cryptocores
  cryptography ip-cores in vhdl / verilog
  ☆41Updated 4 years ago
• mattvenn / multi_project_tools
  tools to help make the most of the limited space we have on the Google sponsored Efabless shuttles
  ☆36Updated 2 years ago
• paulscherrerinstitute / psi_common
  Common elements for FPGA Design (FIFOs, RAMs, etc.)
  ☆35Updated 8 months ago
• Architech-Silica / Designing-a-Custom-AXI-Slave-Peripheral
  A guide to creating custom AXI-lite slave peripherals using the Xilinx Vivado tools
  ☆41Updated 7 years ago
• olofk / wb_intercon
  Wishbone interconnect utilities
  ☆42Updated 8 months ago
• Cognoscan / VerilogCogs
  Verilog Modules for DSP functions and other common tasks to make FPGA development easier and more fun.
  ☆20Updated 10 years ago
• schang412 / cocotbext-spi
  ☆26Updated 6 months ago
• BerkeleyLab / Bedrock
  LBNL RF controls support HDL libraries. Mirroring LBNL's internal Gitlab repository, which is CI enabled
  ☆66Updated 3 weeks ago
• amaranth-farm / amlib
  assorted library of utility cores for amaranth HDL
  ☆96Updated last year
• olofk / fusesocotb
  Quick'n'dirty FuseSoC+cocotb example
  ☆18Updated 11 months ago
• chili-chips-ba / openeye-CamSI
  A truly opensource camera serial interface. No frills. No backdoors that compromise security. Outstanding signal integrity. Hi-rez video …
  ☆70Updated 3 months ago
• lnls-dig / dsp-cores
  Repository containing the DSP gateware cores
  ☆13Updated 3 weeks ago
• m-labs / jesd204b
  JESD204B core for Migen/MiSoC
  ☆35Updated 4 years ago
• VLSI-EDA / PoC-Examples
  This repository contains synthesizable examples which use the PoC-Library.
  ☆38Updated 4 years ago
• zhelnio / ahb_lite_sdram
  SDRAM controller for MIPSfpga+ system
  ☆24Updated 5 years ago
• tmeissner / vhdl_verification
  Examples and design pattern for VHDL verification
  ☆15Updated 9 years ago
• chili-chips-ba / openXC7-TetriSaraj
  Demo of how to use https://github.com/openXC7 tools (yosys+nextpnr-xilinx) to implement the HW side of a custom SoC with RISC-V CPU & our…
  ☆33Updated 8 months ago
• airhdl / spi-to-axi-bridge
  An SPI to AXI4-lite bridge for easy interfacing of airhdl register banks with any microcontroller.
  ☆50Updated last year
• christoph-weiser / mpw6
  submission repository for efabless mpw6 shuttle
  ☆30Updated last year
• alexforencich / xfcp
  Extensible FPGA control platform
  ☆61Updated 2 years ago